TMS44409P Datasheet: DYNAMIC RANDOM-ACCESS MEMORIES





TMS44409P DYNAMIC RANDOM-ACCESS MEMORIES Datasheet

Part Number TMS44409P
Description DYNAMIC RANDOM-ACCESS MEMORIES
Manufacture etcTI
Total Page 26 Pages
PDF Download Download TMS44409P Datasheet PDF

Features: ADVANCE INFORMATION TMS44409, TMS44409P 1048576-WORD BY 4-BIT DYNAMIC RANDOM-A CCESS MEMORY SMHS563 – JULY1995 D Or ganization . . . 1 048576 × 4 D Single 5-V Power Supply (±10% Tolerance) DJ PACKAGE ( TOP VIEW ) DGA PACKAGE ( TO P VIEW ) D Performance Ranges: ACCESS TIME (tRAC) (MAX) ’44409 / P-60 60 n s ’44409 / P-70 70 ns ACCESS TIME (t CAC) (MAX) 15 ns 18 ns ACCESS TIME (tA A) (MAX) 30 ns 35 ns EDO CYCLE (tHPC) (MIN) 25 ns 30 ns DQ1 DQ2 W RAS A9 1 2 3 4 5 26 VSS 25 DQ4 24 DQ3 23 CAS 22 OE DQ1 DQ2 W RAS A9 1 2 3 4 5 26 VS S 25 DQ4 24 DQ3 23 CAS 22 OE ’44409 / P-80 80 ns 20 ns 40 ns 35 ns D Ex tended Data Out ( EDO) Operation D CAS -Before-RAS ( CBR) Refresh A0 9 18 A8 A0 9 18 A8 D 3-State Unlatched Outp ut D Low Power Dissipation D All Inputs / Outputs and Clocks are TTL-Compatibl e A1 A2 A3 VCC 10 11 12 13 17 A7 16 A6 15 A5 14 A4 A1 A2 A3 VCC 10 11 12 13 17 A7 16 A6 15 A5 14 A4 D Long Ref resh Period – 1 024 Cycle Refresh in 16 ns (max) – 128 ms on Low Power,.

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TMS44409, TMS44409P
1048576-WORD BY 4-BIT
DYNAMIC RANDOM-ACCESS MEMORY
SMHS563 – JULY1995
D Organization . . . 1 048576 × 4
D Single 5-V Power Supply (±10% Tolerance)
DJ PACKAGE
( TOP VIEW )
DGA PACKAGE
( TOP VIEW )
D Performance Ranges:
ACCESS
TIME
(tRAC)
(MAX)
’44409 / P-60 60 ns
’44409 / P-70 70 ns
ACCESS
TIME
(tCAC)
(MAX)
15 ns
18 ns
ACCESS
TIME
(tAA)
(MAX)
30 ns
35 ns
EDO
CYCLE
(tHPC)
(MIN)
25 ns
30 ns
DQ1
DQ2
W
RAS
A9
1
2
3
4
5
26 VSS
25 DQ4
24 DQ3
23 CAS
22 OE
DQ1
DQ2
W
RAS
A9
1
2
3
4
5
26 VSS
25 DQ4
24 DQ3
23 CAS
22 OE
’44409 / P-80 80 ns
20 ns
40 ns
35 ns
D Extended Data Out ( EDO) Operation
D CAS-Before-RAS ( CBR) Refresh
A0 9
18 A8
A0 9
18 A8
D 3-State Unlatched Output
D Low Power Dissipation
D All Inputs / Outputs and Clocks are
TTL-Compatible
A1
A2
A3
VCC
10
11
12
13
17 A7
16 A6
15 A5
14 A4
A1
A2
A3
VCC
10
11
12
13
17 A7
16 A6
15 A5
14 A4
D Long Refresh Period
– 1 024 Cycle Refresh in 16 ns (max)
– 128 ms on Low Power, Self-Refresh
Version (TMS44409P Only)
D Operating Free-Air Temperature Range
0°C to 70°C
PIN NOMENCLATURE
A0 – A9
CAS
DQ1 – DQ4
Address Inputs
Column-Address Strobe
Data In / Data Out
description
OE
RAS
Output Enable
Row-Address Strobe
The TMS44409 is a high-speed 4 194 304-bit
dynamic random-access memory (DRAM) orga-
nized as 1 048 576 words of four bits each. This
VCC
VSS
W
5-V Supply
Ground
Write Enable
device features maximum RAS access times of
60 ns, 70 ns and 80 ns. Maximum power
consumption is as low as 385 mW operating and
6 mW standby. All inputs and outputs, including
clocks, are compatible with Series 74 TTL. All addresses and data-in lines are latched on chip to simplify system
design. Data out is unlatched to allow greater system flexibility.
The TMS44409P is a high-speed, low-power, self-refresh version of the TMS44409 DRAM.
All versions of the TMS44409 / P are offered in a 300-mil 20 / 26 J-lead plastic surface-mount SOJ package ( DJ
suffix) and a 20 / 26-lead plastic small outline package ( DGA suffix). These devices are characterized for
operation from 0°C to 70°C.
ADVANCE INFORMATION concerns new products in the sampling or
preproduction phase of development. Characteristic data and other
specifications are subject to change without notice.
Copyright © 1995, Texas Instruments Incorporated
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443
1

                    
                    






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