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TMS45160P Dataheets PDF



Part Number TMS45160P
Manufacturers Texas Instruments
Logo Texas Instruments
Description DYNAMIC RANDOM-ACCESS MEMORIES
Datasheet TMS45160P DatasheetTMS45160P Datasheet (PDF)

TMS45160, TMS45160P 262144-WORD BY 16-BIT HIGH-SPEED DYNAMIC RANDOM-ACCESS MEMORIES SMHS160D – AUGUST 1992 – REVISED JUNE 1995 This data sheet is applicable to all TMS45160/Ps symbolized with Revision “D” and subsequent revisions as described on page 21. D Organization . . . 262144 × 16 D 5-V Supply (±10% Tolerance) D Performance Ranges: ACCESS ACCESS ACCESS READ OR TIME TIME TIME WRITE tRAC MAX tCAC MAX tAA CYCLE MAX MIN ’45160/P-60 60 ns 15 ns 30 ns 110 ns ’45160/P-70 70 ns 20 ns 3.

  TMS45160P   TMS45160P



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TMS45160, TMS45160P 262144-WORD BY 16-BIT HIGH-SPEED DYNAMIC RANDOM-ACCESS MEMORIES SMHS160D – AUGUST 1992 – REVISED JUNE 1995 This data sheet is applicable to all TMS45160/Ps symbolized with Revision “D” and subsequent revisions as described on page 21. D Organization . . . 262144 × 16 D 5-V Supply (±10% Tolerance) D Performance Ranges: ACCESS ACCESS ACCESS READ OR TIME TIME TIME WRITE tRAC MAX tCAC MAX tAA CYCLE MAX MIN ’45160/P-60 60 ns 15 ns 30 ns 110 ns ’45160/P-70 70 ns 20 ns 35 ns 130 ns ’45160/P-80 80 ns 20 ns 40 ns 150 ns D Enhanced-Page-Mode Operation With xCAS-Before-RAS (xCBR) Refresh D Long Refresh Period 512-Cycle Refresh in 8 ms (Max) 64 ms Max for Low Power With Self-Refresh Version ( TMS45160P) D 3-State Unlatched Output D Low Power Dissipation D Texas Instruments EPIC™ CMOS Process D All Inputs, Outputs, and Clocks Are TTL Compatible D High-Reliability, 40-Lead, 400-Mil-Wide Plastic Surface-Mount (SOJ) Package and 40/44-Lead Thin Small-Outline Package ( TSOP) D Operating Free-Air Temperature Range 0°C to 70°C D Low Power With Self-Refresh Version D Upper and Lower Byte Control During Read and Write Operations description DZ PACKAGE ( TOP VIEW ) VCC DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 NC NC W RAS NC A0 A1 A2 A3 VCC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 VSS 39 DQ15 38 DQ14 37 DQ13 36 DQ12 35 VSS 34 DQ11 33 DQ10 32 DQ9 31 DQ8 30 NC 29 LCAS 28 UCAS 27 OE 26 A8 25 A7 24 A6 23 A5 22 A4 21 VSS DGE PACKAGE ( TOP VIEW ) VCC DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 1 2 3 4 5 6 7 8 9 10 44 VSS 43 DQ15 42 DQ14 41 DQ13 40 DQ12 39 VSS 38 DQ11 37 DQ10 36 DQ9 35 DQ8 NC NC W RAS NC A0 A1 A2 A3 VCC 13 14 15 16 17 18 19 20 21 22 32 NC 31 LCAS 30 UCAS 29 OE 28 A8 27 A7 26 A6 25 A5 24 A4 23 VSS PIN NOMENCLATURE A0 – A8 DQ0 – DQ15 LCAS NC OE RAS UCAS VCC VSS W Address Inputs Data In / Data Out Lower Column-Address Strobe No Internal Connection Output Enable Row-Address Strobe Upper Column-Address Strobe 5-V Supply Ground Write Enable The TMS45160 series are high-speed, 4 194 304-bit dynamic random-access memories organized as 262 144 words of 16 bits each. The TMS45160P series are high-speed, low-power, self-refresh 4 194 304-bit dynamic random-access memories organized as 262 144 words of 16 bits each. They employ state-of-the-art EPIC™ ( Enhanced Performance Implanted CMOS) technology for high performance, reliability, and low power at low cost. These devices feature maximum RAS access times of 60 ns, 70 ns, and 80 ns. Maximum power dissipation is as low as 770 mW operating and 11 mW standby on 80-ns devices. All inputs and outputs, including clocks, are compatible with Series 74 TTL. All addresses and data-in lines are latched on chip to simplify system design. Data out is unlatched to allow greater system flexibility. The TMS45160 and TMS45160P are each offered in a 40-lead plastic surface-mount SOJ package ( DZ suffix) and a 40/44-lead plastic surface-mount small-outline ( TSOP) packag.


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