Document
TMS55160, TMS55161, TMS55170, TMS55171 262144 BY 16-BIT MULTIPORT VIDEO RAMS
D Organization:
DRAM: 262 144 Words × 16 Bits SAM: 256 Words × 16 Bits
D Single 5.0-V Power Supply (±10%) D Dual-Port Accessibility – Simultaneous and
Asynchronous Access From the DRAM and
Serial-Address-Memory (SAM) Ports
D Write-per-Bit Function for Selective Write to
Each I/O of the DRAM Port
D Byte-Write Function for Selective Write to
Lower Byte (DQ0 – DQ7) or Upper Byte
(DQ8– DQ15) of the DRAM Port
D 4 - Column or 8 - Column Block - Write
Function for Fast Area - Fill Operations
D Enhanced Page Mode for Faster Access
With Extended-Data-Output (EDO) Option
for Faster System Cycle Time
D CAS-Before-RAS (CBR) and Hidden
Refresh Functions
D Long Refresh Period – Every 8 ms
(Maximum)
D Full - Register- Transfer Function Transfers
Data from the DRAM to the Serial Register
performance ranges
SMVS464 – MARCH1996
D Split-Register-Transfer Function Transfers
Data from the DRAM to One-Half of the
Serial Register While the Other Half is
Outputing Data to the SAM Port
D 256 Selectable Serial Register Starting
Points
D Programmable Split-Register Stop Point D Up to 55-MHz Uninterrupted Serial-Data
Streams
D 3-State Serial Outputs for Easy Multiplexing
of Video Data Streams
D All Inputs/Outputs and Clocks TTL
Compatible
D Compatible With JEDEC Standards D Designed to Work With the Texas
Instruments (TI) Graphics Family
D Fabricated Using TI’s Enhanced
Performance Implanted CMOS (EPIC) Process
– 60 Speed – 70 Speed
ACCESS TIME ROW ENABLE
tRAC (MAX)
60 ns
70 ns
ACCESS TIME SERIAL DATA
tSCA (MIN)
15 ns
20 ns
DRAM PAGE CYCLE TIME
tPC (MIN)
35 ns
40 ns
DRAM EDO CYCLE TIME
tPC (MIN)
30 ns
30 ns
SERIAL CYCLE TIME
tSCC (MIN)
18 ns
22 ns
OPERATING CURRENT SERIAL PORT STANDBY
lCC1 (MAX)
180 mA
165 mA
DEVICE 55160 55161 55170 55171
Table 1. Device Option Table
POWER SUPPLY VOLTAGE 5.0 V ± 0.5 V 5.0 V ± 0.5 V 5.0 V ± 0.5 V 5.0 V ± 0.5 V
BLOCK-WRITE CAPABILITY 4 -column 4 -column 8 - column 8 - column
PAGE / EDO OPERATION Page EDO Page EDO
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
TI and EPIC are trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 1996, Texas Instruments Incorporated
•POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443
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TMS55160, TMS55161, TMS55170, TMS55171 262144 BY 16-BIT MULTIPORT VIDEO RAMS
SMVS464 – MARCH1996
DGH PACKAGE (TOP VIEW)
VCC TRG VSS SQ0 DQ0 SQ1
DQ1 VCC SQ2
DQ2
SQ3 DQ3 VSS SQ4 DQ4 SQ5
DQ5 VCC SQ6 DQ6 SQ7 DQ7 VSS CASL
WE RAS
A8 A7
A6 A5 A4 VCC
1 2 3 4 5 6 7 8 9 10 11
12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
29 30 31 32.