DMOS ARRAY. TPIC2322L Datasheet

TPIC2322L ARRAY. Datasheet pdf. Equivalent

Part TPIC2322L
Description 3-CHANNEL COMMON-SOURCE LOGIC-LEVEL POWER DMOS ARRAY
Feature ą TPIC2322L 3ĆCHANNEL COMMONĆSOURCE LOGICĆLEVEL POWER DMOS ARRAY ą SLIS036A − JUNE 1994 − REVISED OC.
Manufacture etcTI
Datasheet
Download TPIC2322L Datasheet



TPIC2322L
ą TPIC2322L
3ĆCHANNEL COMMONĆSOURCE LOGICĆLEVEL POWER DMOS ARRAY
ą
SLIS036A − JUNE 1994 − REVISED OCTOBER 1994
Low rDS(on) . . . 0.6 Typ
High-Voltage Outputs . . . 60 V
Pulsed Current . . . 2.25 A Per Channel
Fast Commutation Speed
Direct Logic-Level Interface
D PACKAGE
(TOP VIEW)
DRAIN1
GATE2
DRAIN2
DRAIN3
1
2
3
4
8 GATE1
7 SOURCE/GND
6 SOURCE/GND
5 GATE3
description
The TPIC2322L is a monolithic logic-level power DMOS array that consists of three electrically isolated
N-channel enhancement-mode DMOS transistors configured with a common source and open drains.
The TPIC2322L is offered in a standard eight-pin small-outline surface-mount (D) package and is characterized
for operation over the case temperature range of − 40°C to 125°C.
schematic
DRAIN1
1
Q1
8
GATE1
Z1
DRAIN2
3
Q2
2
GATE2
Z2
DRAIN3
4
Q3
5
GATE3
Z3
6, 7
SOURCE, GND
absolute maximum ratings over operating case temperature range (unless otherwise noted)
Drain-to-source voltage, VDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 V
Gate-to-GND voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 V
Drain-to-GND voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 V
Gate-to-source voltage, VGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 V
Continuous drain current, each output, all outputs on, TC = 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.75 A
Continuous source-to-drain diode current, TC = 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.75 A
Pulsed drain current, each output, Imax, TC = 25°C (see Note 1 and Figure 15) . . . . . . . . . . . . . . . . . . 2.25 A
Single-pulse avalanche energy, EAS, TC = 25°C (see Figure 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30.4 mJ
Continuous total power dissipation at (or below) TC = 25°C (see Figure 15) . . . . . . . . . . . . . . . . . . . . 0.95 W
Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 150°C
Operating case temperature range, TC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: Pulse duration = 10 ms and duty cycle = 2%.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS
77251−1443
Copyright 1994, Texas Instruments Incorporated
2−1



TPIC2322L
TPIC2322L
3ĆCHANNEL COMMONĆSOURCE LOGICĆLEVEL POWER DMOS ARRAY
ą
SLIS036A − JUNE 1994 − REVISED OCTOBER 1994
ą
electrical characteristics, TC = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP
V(BR)DSX Drain-to-source breakdown voltage
VGS(th) Gate-to-source threshold voltage
ID = 250 µA,
ID = 1 mA,
See Figure 5
VGS = 0
VDS = VGS,
60
1.5 1.85
V(BR)
VDS(on)
Reverse drain to GND breakdown voltage
Drain-to-source on-state voltage
Drain to GND current = 250 µA
ID = 0.75 A,
VGS = 5 V,
See Notes 2 and 3
100
0.45
VF(SD)
Forward on-state voltage, source-to-drain
IS = 0.75 A,
VGS = 0
See Notes 2 and 3 and Figure 12
0.85
IDSS
IGSSF
IGSSR
Ilkg
Zero-gate-voltage drain current
Forward gate current, drain short circuited to source
Reverse gate current, drain short circuited to source
VDS = 48 V,
VGS = 0
VGS = 16 V,
VSG = 16 V,
Leakage current, drain-to-GND
VDGND = 48 V
TC = 25°C
TC = 125°C
VDS = 0
VDS = 0
TC = 25°C
TC = 125°C
0.05
0.5
10
10
0.05
0.5
rDS(on) Static drain-to-source on-state resistance
VGS = 5 V,
ID = 0.75 A,
See Notes 2 and 3
and Figures 6 and 7
TC = 25°C
TC = 125°C
0.6
0.94
gfs Forward transconductance
VDS = 15 V,
ID = 0.5 A,
See Notes 2 and 3 and Figure 9
0.75 0.9
Ciss
Coss
Crss
Short-circuit input capacitance, common source
Short-circuit output capacitance, common source
Short-circuit reverse transfer capacitance,
common source
VDS = 25 V,
f = 1 MHz,
VGS = 0,
See Figure 11
115
60
30
NOTES: 2. Technique should limit TJ − TC to 10°C maximum.
3. These parameters are measured with voltage-sensing contacts separate from the current-carrying contacts.
MAX
2.2
0.53
1
1
10
100
100
1
10
0.7
1
145
75
40
UNIT
V
V
V
V
V
µA
nA
nA
µA
S
pF
source-to-drain diode characteristics, TC = 25°C (see schematic diagram)
PARAMETER
TEST CONDITIONS
MIN
trr
QRR
Reverse-recovery time
Total diode charge
IF = 0.375 A,
VDS = 48 V,
di/dt = 100 A /µs, See Figures 1 and 14
TYP MAX UNIT
85 ns
0.19 µC
2−2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS
77251−1443





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