MOSFET LATCH. TPIC2406 Datasheet

TPIC2406 LATCH. Datasheet pdf. Equivalent

Part TPIC2406
Description INTELLIGENT-POWER QUAD MOSFET LATCH
Feature ą TPIC2406 INTELLIGENTĆPOWER QUAD MOSFET LATCH ą SLIS012 − D3378, FEBRUARY 1990 • Output Voltage up.
Manufacture etcTI
Total Page 13 Pages
Datasheet
Download TPIC2406 Datasheet



TPIC2406
ą TPIC2406
INTELLIGENTĆPOWER QUAD MOSFET LATCH
ą
SLIS012 − D3378, FEBRUARY 1990
Output Voltage up to 60 V
Four Output Channels of 700-mA Nominal
Current Per Channel
Pulsed Current . . . 3 A Per Channel
Low rDS(on) . . . 0.5 Typ
Avalanche Energy . . . 50 mJ
Thermal Shutdown Protection With Fault
(Overtemperature) Output
NE Package Designed for Heat Sinking
Integral Output Clamp Diodes
Input Transparent Latches for Data Storage
Asynchronous Clear to Turn off All Outputs
Output Parallel Capability for Increased
Current Drive up to 12-A Total Pulsed Load
Current
description
The TPIC2406 is a monolithic, high-voltage,
high-current, quadruple power driver designed for
use in systems that require high load power. The
device contains built-in high-speed output clamp
diodes for inductive transient protection. Power
driver applications include lamps, relays,
solenoids, and dc stepping motors.
NE PACKAGE
(TOP VIEW)
1,4 CLAMP
ENBL
1 IN
1 DRAIN
HEAT SINK
AND GND
2 DRAIN
2 IN
VCC
F
1
2
3
4
5
6
7
8
9
10
20 CLR
19 LGND
18 4 IN
17 4 DRAIN
16 HEAT SINK
15 AND GND
14 3 DRAIN
13 3 IN
12 VDD
11 2,3 CLAMP
FUNCTION TABLE
(each channel)
FUNCTION
Normal
Operation
Thermal
Shutdown
H = high-level,
INPUTS
ENBL CLR IN
X LX
L HL
L HH
H HX
OUTPUT
Y
H
H
L
Q0
X XX
H
L = low-level, X = irrelevant
FAULT
F
H
H
H
H
L
The device features four inverting open-drain outputs, each controlled by an input storage latch with common
clear and enable controls. All inputs accept standard TTL- and CMOS-logic levels. The CLR function is
asynchronous and turns all four outputs off regardless of data inputs. Taking ENBL low puts the input latch into
a transparent mode, allowing the data inputs to affect the output. In this state, all four outputs are held off while
CLR is low, but return to the stages on the data inputs when CLR goes high. When ENBL is taken high, the latch
is put into a storage mode and the last state of the data inputs is held in the latches. If CLR is taken low, the data
in the latches is cleared and all outputs are turned off. If CLR is taken high again, ENBL must be cycled low to
read new data into the latch.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001
Copyright 1990, Texas Instruments Incorporated
2−1



TPIC2406
TPIC2406
INTELLIGENTĆPOWER QUAD MOSFET LATCH
ą
SLIS012 − D3378, FEBRUARY 1990
logic symbol
CLR
ENBL
20
2
R
[TEMP
C1 SHUTDOWN]
10
F
3
1 IN
18
4 IN
8
2 IN
13
3 IN
1D CLAMP
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
4
1 DRAIN
17
4 DRAIN
1
1,4 CLAMP
7
2 DRAIN
14
3 DRAIN
11
2,3 CLAMP
logic diagram (positive logic)
12
VDD
Voltage
Regulator
ą
9
VCC
Undervoltage
Detect
CLR
ENBL
20
2
3
1 IN
8
2 IN
13
3 IN
18
4 IN
19
LGND
R
C1
1D
Thermal
Shutdown
Thermal
Shutdown
Thermal
Shutdown
Thermal
Shutdown
4
1 DRAIN
1 1,4 CLAMP
7 2 DRAIN
11
2,3 CLAMP
14
3 DRAIN
17
4 DRAIN
5,6,15,16
GND
10
F
2−2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001





@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)