DMOS ARRAY. TPIC3322L Datasheet

TPIC3322L ARRAY. Datasheet pdf. Equivalent

Part TPIC3322L
Description 3-CHANNEL COMMON-DRAIN LOGIC-LEVEL POWER DMOS ARRAY
Feature ą TPIC3322L 3ĆCHANNEL COMMONĆDRAIN LOGICĆLEVEL POWER DMOS ARRAY ą SLIS035B − JUNE 1994 − REVISED SEP.
Manufacture etcTI
Datasheet
Download TPIC3322L Datasheet



TPIC3322L
ą TPIC3322L
3ĆCHANNEL COMMONĆDRAIN LOGICĆLEVEL POWER DMOS ARRAY
ą
SLIS035B − JUNE 1994 − REVISED SEPTEMBER 1995
Low rDS(on) . . . 0.6 Typ
High-Voltage Outputs . . . 60 V
Pulsed Current . . . 2.25 A Per Channel
Fast Commutation Speed
Direct Logic-Level Interface
D PACKAGE
(TOP VIEW)
SOURCE1
GATE2
SOURCE2
SOURCE3
1
2
3
4
8 GATE1
7 GND
6 DRAIN
5 GATE3
description
The TPIC3322L is a monolithic logic-level power DMOS transistor array that consists of three isolated
N-channel enhancement-mode DMOS transistors configured with a common drain and open sources.
The TPIC3322L is offered in a standard 8-pin small-outline surface-mount (D) package and is characterized for
operation over the case temperature range of − 40°C to 125°C.
schematic diagram
DRAIN
6
Q1
8
GATE1
Q2
Z1
2
GATE2
Q3
Z2 5
GATE3
D1
Z3
1
SOURCE1
3
SOURCE2
4
SOURCE3
7
GND
absolute maximum ratings over operating case temperature range (unless otherwise noted)
Drain-to-source voltage, VDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 V
Source-to-GND voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 V
Drain-to-GND voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 V
Gate-to-source voltage, VGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 V
Continuous drain current, each output, all outputs on, TC = 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.75 A
Continuous source-to-drain diode current, TC = 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.75 A
Pulsed drain current, each output, Imax, TC = 25°C (see Note 1 and Figure 15) . . . . . . . . . . . . . . . . . . 2.25 A
Single-pulse avalanche energy, EAS, TC = 25°C (see Figure 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 mJ
Continuous total power dissipation at (or below) TC = 25°C (see Figure 15) . . . . . . . . . . . . . . . . . . . . 0.95 W
Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 150°C
Operating case temperature range, TC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: Pulse duration = 10 ms and duty cycle = 2%.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS
77251−1443
Copyright 1995, Texas Instruments Incorporated
1



TPIC3322L
TPIC3322L
3ĆCHANNEL COMMONĆDRAIN LOGICĆLEVEL POWER DMOS ARRAY
ą
SLIS035B − JUNE 1994 − REVISED SEPTEMBER 1995
ą
electrical characteristics, TC = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP
V(BR)DSX
VGS(th)
V(BR)
Drain-to-source breakdown voltage
Gate-to-source threshold voltage
Reverse drain-to-GND breakdown voltage
(across D1)
ID = 250 µA,
ID = 1 mA,
VGS = 0
VDS = VGS
Drain-to-GND current = 250 µA
60
1.5 1.85
100
VDS(on) Drain-to-source on-state voltage
ID = 0.75 A,
VGS = 5 V,
See Notes 2 and 3
0.45
VF Forward on-state voltage, GND-to-drain
ID = 0.75 A,
See Notes 2 and 3
1.8
VF(SD)
Forward on-state voltage, source-to-drain
IS = 0.75 A,
VGS = 0,
See Notes 2 and 3 and Figure 12
0.85
IDSS
IGSSF
IGSSR
Ilkg
rDS(on)
Zero-gate-voltage drain current
Forward gate current, drain short circuited to source
Reverse gate current, drain short circuited to source
Leakage current, drain-to-GND
Static drain-to-source on-state resistance
VDS = 48 V,
VGS = 0
VGS = 16 V,
VSG = 16 V,
VDGND = 48 V
VGS = 5 V,
ID = 0.75 A,
See Notes 2 and 3
and Figures 6 and 7
TC = 25°C
TC = 125°C
VDS = 0
VDS = 0
TC = 25°C
TC = 125°C
TC = 25°C
TC = 125°C
0.05
0.5
10
10
0.05
0.5
0.6
0.94
gfs Forward transconductance
VDS = 10 V,
ID = 0.5 A,
See Notes 2 and 3 and Figure 9
0.75 0.9
Ciss
Coss
Crss
Short-circuit input capacitance, common source
Short-circuit output capacitance, common source
Short-circuit reverse transfer capacitance,
common source
VDS = 25 V,
f = 1 MHz,
VGS = 0,
See Figure 11
115
60
30
NOTES: 2. Technique should limit TJ − TC to 10°C maximum.
3. These parameters are measured with voltage-sensing contacts separate from the current-carrying contacts.
MAX
2.2
0.53
1
1
10
100
100
1
10
0.7
1
145
75
40
UNIT
V
V
V
V
V
V
µA
nA
nA
µA
S
pF
source-to-drain and GND-to-drain diode characteristics, TC = 25°C
PARAMETER
TEST CONDITIONS
trr(SD) Reverse-recovery time
QRR Total diode charge
IS = 0.375 A,
di/dt = 100 A /µs,
See Figures 1 and 14
VGS = 0,
VDS = 48 V,
Z1, Z2, Z3
D1
Z1, Z2, Z3
D1
MIN TYP MAX UNIT
30
ns
85
0.03
µC
0.19
2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS
77251−1443





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