monolithic dual n-channel JFET
monolithic dual n-channel JFETs
designed for • • •
• Very High Input Impedance DiHerential Amplifiers
Electrometers
• Im...
Description
monolithic dual n-channel JFETs
designed for
Very High Input Impedance DiHerential Amplifiers
Electrometers
Impedance Converters
Performance Curves NNT See Section 4
BENEFITS
H
--Siliconix
High Input Impedance
IG = 5 pA (U427) High Gain 9fs = 120 Mmho Minimum @
10 = 30 MA
Low Power Supply Operation
VGS(off} = 2 V Maximum (U427)
Minimum System Error and Calibration
25 mV Maximum Offset
ABSOLUTE MAXIMUM RATINGS (25°C)
TO-78
Saa Section 6
Gate-to-Gate Voltage
Gate-Drain or Gate-Source Voltage
Gate Current
=Device Dissipation (Each Side), T A 25°C
±40V -40 V 10 mA
~~G, G2
(Derate 3.2 mW;oC to 150°C) .
400mW
8, 82
=Total Device Dissipation, T A 25° C
(Derate 6.0 mW;oC to 150°C)
Storage Temperature Range
750mW -65 to +150°C
ELECTRICAL CHARACTERISTICS (25°C unless otherwise noted)
c S2
405 °2
o 0,
G1 b
0 G2
'0 7 01 ,0
S,
Bottom View
A , 02 0,
~,
Characteristic
1 I-
2 1-
3S T
I-A 4T I
ISc
-6
7
BVGSS BVG1G2 IGSS
IG VGSlottl VGS lOSS
Gate-Source Breakdown Voltage Gate-Gate Breakdown Voltage Gate Reverse Current (Note 1)
Gate Operating Current (Note 1) Gate-Source Cutoff Voltage Gate-Source Voltage Saturation Dram Current
U427
U428
M,n Typ Max M,n Typ Max
-40 -60
-40 -60
±40 ±40
5 10
5 10
35
35
-0.4
-20 -0.4
-3,0
-1.8 -2.9
60 1000 60 800
Unit
V
pA nA pA nA V
/J. A
Test Conditions
IG = -1 /J.A, VOS = 0
IG = -1 /J.A, 10 = O.IS = 0
T = +2SOC
T - + 12SoC
VGS = -20 V. VOS = 0
T "" +25°C T-+12SoC VOG= 10V,10=30/J.A
VDS= 10V...
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