EEPROM. X28HC64 Datasheet

X28HC64 Datasheet PDF


Part

X28HC64

Description

Byte Alterable EEPROM

Manufacture

Renesas

Page 18 Pages
Datasheet
Download X28HC64 Datasheet


X28HC64 Datasheet
X28HC64
64k, 8k x 8-Bit 5 Volt, Byte Alterable EEPROM
The X28HC64 is an 8k x 8 EEPROM, fabricated with Intersil’s
proprietary, high performance, floating gate CMOS technology.
Like all Intersil programmable nonvolatile memories, the
X28HC64 is a 5V only device. It features the JEDEC approved
pinout for byte-wide memories, compatible with industry
standard RAMs.
The X28HC64 supports a 64-byte page write operation, effectively
providing a 32µs/byte write cycle, and enabling the entire
memory to be typically written in 0.25 seconds. The X28HC64
also features DATA Polling and Toggle Bit Polling, two methods
providing early end of write detection. In addition, the X28HC64
includes a user-optional software data protection mode that
further enhances Intersil’s hardware write protect capability.
Intersil EEPROMs are designed and tested for applications
requiring extended endurance. Inherent data retention is
greater than 100 years.
Pin Configurations
X28HC64
(28 LD PDIP, SOIC)
TOP VIEW
NC
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
VSS
1 28
2 27
3 26
4 25
5 24
6 23
7 X28HC64 22
8 21
9 20
10 19
11 18
12 17
13 16
14 15
VCC
WE
NC
A8
A9
A11
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
DATASHEET
FN8109
Rev 4.00
June 27, 2016
Features
• 70ns access time
• Simple byte and page write
- Single 5V supply
- No external high voltages or VP-P control circuits
- Self-timed
- No erase before write
- No complex programming algorithms
- No overerase problem
• Low power CMOS
- 40mA active current maximum
• 200µA standby current maximum
• Fast write cycle times
- 64-byte page write operation
- Byte or page write cycle: 2ms typical
- Complete memory rewrite: 0.25s typical
- Effective byte write cycle time: 32µs typical
• Software data protection
• End of write detection
- DATA polling
- Toggle bit
• High reliability
- Endurance: 100,000 cycles
- Data retention: 100 years
• JEDEC approved byte-wide pinout
• Pb-free available (RoHS compliant)
X28HC64
(32 LD PLCC)
TOP VIEW
4 3 2 1 32 31 30
A6 5
29 A8
A5 6
28 A9
A4 7
27 A11
A3 8
A2 9
X28HC64
26 NC
25 OE
A1 10
24 A10
A0 11
23 CE
NC 12
22 I/O7
I/O0
13 21
14 15 16 17 18 19 20
I/O6
FN8109 Rev 4.00
June 27, 2016
Page 1 of 18

X28HC64 Datasheet
X28HC64
Ordering Information
PART NUMBER
PART MARKING
TEMPERATURE ACCESS TIME
RANGE (°C)
(ns)
PACKAGE
PKG.
DWG. #
X28HC64J-70 (Notes 1, 6)
(No longer available, recommended
replacement: X28HC64JZ-70)
X28HC64J-70 CY
0 to +70
70 32 Ld PLCC
N32.45x55
X28HC64JIZ-70 (Notes 1, 4, 6)
X28HC64JI-70 ZCY
-40 to +85
32 Ld PLCC (RoHS Compliant) N32.45x55
X28HC64JZ-70 (Notes 1, 4, 6)
X28HC64J-70 ZCY
0 to +70
32 Ld PLCC (RoHS Compliant) N32.45x55
X28HC64SIZ-70 (Notes 4, 6)
X28HC64SI-70 CYZ
-40 to +85
28 Ld SOIC (300 mil) (RoHS
Compliant)
M28.3
X28HC64SZ-70 (Notes 4, 6)
X28HC64S-70 CYZ
0 to +70
28 Ld SOIC (300 mil) (RoHS
Compliant)
M28.3
X28HC64J-90 (Notes 1, 6)
(No longer available, recommended
replacement: X28HC64JIZ-90)
X28HC64J-90 CY
0 to +70
90 32 Ld PLCC
N32.45x55
X28HC64JI-90 (Notes 1, 3, 6)
(No longer available, recommended
replacement: X28HC64JIZ-90)
X28HC64JI-90 CY
-40 to +85
32 Ld PLCC
N32.45x55
X28HC64JIZ-90 (Notes 1, 4, 6)
X28HC64JI-90 ZCY
-40 to +85
32 Ld PLCC (RoHS Compliant) N32.45x55
X28HC64PIZ-90 (Notes 4, 5)
X28HC64PI-90 CYZ
-40 to +85
28 Ld PDIP (RoHS Compliant) E28.6
X28HC64PZ-90 (Notes 4, 5)
X28HC64P-90 CYZ
0 to +70
28 Ld PDIP (RoHS Compliant) E28.6
X28HC64J-12 (Notes 1, 6)
(No longer available, recommended
replacement: X28HC64JZ-12)
X28HC64J-12 CY
0 to +70
120 32 Ld PLCC
N32.45x55
X28HC64JI-12 (Notes 1, 6)
(No longer available, recommended
replacement: X28HC64JIZ-12)
X28HC64JI-12 CY
-40 to +85
32 Ld PLCC
N32.45x55
X28HC64JIZ-12 (Notes 1, 4, 6)
X28HC64JI-12 ZCY
-40 to +85
32 Ld PLCC (RoHS Compliant) N32.45x55
X28HC64JZ-12* (Notes 1, 4, 6)
X28HC64J-12 ZCY
0 to +70
32 Ld PLCC (RoHS Compliant) N32.45x55
X28HC64PIZ-12 (Notes 4, 5)
X28HC64PI-12 CYZ
-40 to +85
28 Ld PDIP (RoHS Compliant) E28.6
X28HC64PZ-12 (Notes 4, 5)
X28HC64P-12 CYZ
0 to +70
28 Ld PDIP (RoHS Compliant) E28.6
X28HC64SIZ-12 (Notes 2, 4, 6)
X28HC64SI-12 CYZ
-40 to +85
28 Ld SOIC (300 mil) (RoHS
Compliant)
M28.3
X28HC64SZ-12 (Notes 4, 6)
X28HC64S-12 CYZ
0 to +70
28 Ld SOIC (300 mil) (RoHS
Compliant)
M28.3
NOTES:
1. Add “T1” suffix for 750 unit tape and reel option.
2. Add “T1” suffix for 1000 unit tape and reel option.
3. Add “T2” suffix for 750 unit tape and reel option.
4. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-
free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
5. Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.
6. For Moisture Sensitivity Level (MSL), please see product information page for X28HC64. For more information on MSL, please see tech brief TB363.
FN8109 Rev 4.00
June 27, 2016
Page 2 of 18


Features Datasheet pdf X28HC64 64k, 8k x 8-Bit 5 Volt, Byte Alt erable EEPROM The X28HC64 is an 8k x 8 EEPROM, fabricated with Intersil’s pr oprietary, high performance, floating g ate CMOS technology. Like all Intersil programmable nonvolatile memories, the X28HC64 is a 5V only device. It feature s the JEDEC approved pinout for byte-wi de memories, compatible with industry s tandard RAMs. The X28HC64 supports a 64 -byte page write operation, effectively providing a 32µs/byte write cycle, an d enabling the entire memory to be typi cally written in 0.25 seconds. The X28H C64 also features DATA Polling and Togg le Bit Polling, two methods providing e arly end of write detection. In additio n, the X28HC64 includes a user-optional software data protection mode that fur ther enhances Intersil’s hardware wri te protect capability. Intersil EEPROMs are designed and tested for applicatio ns requiring extended endurance. Inhere nt data retention is greater than 100 y ears. Pin Configurations X28HC64 (28 LD PDIP, SOIC) TOP VIEW NC A1.
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