n-channel dual enhancement mode lateral D-MOS FET
n-channel dual enhancement mode
-o lateral D-MOS FETs
c::4 designed lor. · ·
Q
CI) • Wideband DiHerential Amplifiers
• C...
Description
n-channel dual enhancement mode
-o lateral D-MOS FETs
c::4 designed lor. · ·
Q
CI) Wideband DiHerential Amplifiers
Cascode High Slew Rate Amplifiers
Single Ended High-Speed Amps
High-Speed Analog Comparators
Sample & Hold Ckts High-Speed Matched Analog
Switches
H
Silicanix
FEATURES High Figure-of-Merit gfs/C Ultra Low Feedback Capacitance 0.3 pF Low Output Capacitance Low Input (Gate) Leakage Non-Critical Operating CurrentNoltage Matched Characteristics
BENEFITS High Frequency Performance High Slew Rate High Speed Switching Tight Temperature Tracking
ABSOLUTE MAXIMUM RATINGS (25°C) Drain-to-Drain Voltage ....................... ±25V Drain-Source Voltage ........................ +25V Drain Current .............................. 50 mA Device Dissipation (Each Side),
(Derate 3 mW/°C) ........................367 mW Total Device Dissipation
(Derate 4 mW/oC) ........................ 500 mW Storage Temperature Range ........ -65 to +200°C Lead Temperature
(1/16" from case for 10 seconds) ........... 300°C
TO·78 See Section 6
5,
5,
Bottom View
3-88 Silicanix
ELECTRICAL CHARACTERISTICS (25°C unless otherwise noted)
Characteristic
Min Typ Max
Unit
IGss BVOs
Gate Reverse Current
0.05
Drain-Source Breakdown Voltage
25
1
nA V
VGs(th)
Gate-Source Threshold Voltage
0.1 0.8 2.0
V
VGs Gate-Source Voltage Gate Operating
IG CUrrent
1.9 3.0 0.05 1
V nA
Common-Source
gls Forward
7,000
9,000
15,000
",mhos
Transconductance
Test Conditi...
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