TPIC5223L

TPIC5223L 2-CHANNEL INDEPENDENT GATE-PROTECTED LOGIC-LEVEL POWER DMOS ARRAY SLIS043A – NOVEMBER 1994 – REVISED SEPTEMBER 1995 D Low rDS(on) . . . 0.38 Ω Typ D Voltage Output . . . 60 V D Input Protection Circuitry . . . 18 V D Pulsed Current . . . 3 A Per Channel D Extended ESD Capability . . . 4000 V D Direct Logic-Level Interface D PACKAGE (TOP VIEW) GND SOURCE1 GATE2 DRAIN2 1 2 3 4 8 DRAIN1 7 GATE1 6 SOURCE2 5 NC description NC – No internal connection The TPIC5223L is a monolithic gate-protected logic-level power DMOS array that consists of two electrically isolated independent N-channel enhancement-mode DMOS transistors. Each transistor features integrated high-current zener diodes (ZCXa and ZCXb) to prevent gate damage in the event that an overstress condition occurs. These zener diodes also provide up to 4000 V of ESD protection when tested using the human-body model of a 100-pF capacitor in series with a 1.5-kΩ resistor. The TPIC5223L is offered in a standard eight-pin small-outline surface-mount (D) package and is characterized for operation over the case temperature of – 40°C to 125°C. schematic DRAIN1 8 GATE2 3 DRAIN2 4 7 GATE1 ZC1b ZC1a Q1 D1 Z1 Q2 ZC2b ZC2a D2 Z2 2 SOURCE1 1 GND 6 SOURCE2 NOTE A: For correct operation, no terminal may be taken below GND. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessa...