TPIC5322L

TPIC5322L 3ĆCHANNEL INDEPENDENT LOGICĆLEVEL POWER DMOS ARRAY D Low rDS(on) . . . 0.45 Ω Typ D High-Voltage Outputs . . . 60 V D Pulsed Current . . . 3 A Per Channel D Fast Commutation Speed D Direct Logic-Level Interface description The TPIC5322L is a monolithic logic-level power DMOS array that consists of three electrically isolated independent N-channel enhancementmode DMOS transistors. The TPIC5322L is offered in a standard 16-pin small-outline surface-mount (D) package and is characterized for operation over the case temperature range of −40°C to 125°C. SLIS034A − JUNE 1994 − REVISED NOVEMBER 1994 D PACKAGE (TOP VIEW) GND SOURCE1 SOURCE1 SOURCE2 SOURCE2 SOURCE3 SOURCE3 GATE3 1 2 3 4 5 6 7 8 16 DRAIN1 15 DRAIN1 14 GATE1 13 DRAIN2 12 DRAIN2 11 GATE2 10 DRAIN3 9 DRAIN3 schematic DRAIN1 15, 16 GATE2 11 DRAIN2 12, 13 GATE3 8 DRAIN3 9, 10 Q1 GATE1 14 D1 Z1 Q2 D2 Z2 Q3 D3 Z3 2, 3 SOURCE1 1 GND 4, 5 SOURCE2 6, 7 SOURCE3 absolute maximum ratings over operating case temperature range (unless otherwise noted)† Drain-to-source voltage, VDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 V Source-to-GND voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 V Drain-to-GND voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ....