Document
TPIC5323L
3-CHANNEL INDEPENDENT GATE-PROTECTED LOGIC-LEVEL
POWER DMOS ARRAY
SLIS044A – NOVEMBER 1994 – REVISED SEPTEMBER 1995
D Low rDS(on) . . . 0.6 Ω Typ D Voltage Output . . . 60 V
D PACKAGE (TOP VIEW)
D Input Protection Circuitry . . . 18 V D Pulsed Current . . . 3 A Per Channel D Extended ESD Capability . . . 4000 V D Direct Logic-Level Interface
DRAIN2 DRAIN2 SOURCE2 SOURCE2
1 2 3 4
16 GATE1 15 SOURCE1 14 SOURCE1 13 DRAIN1
GATE2 5 12 DRAIN1
description
DRAIN3 6 11 SOURCE3
The TPIC5323L is a monolithic gate-protected logic-level power DMOS array that consists of
DRAIN3 7 GND 8
10 SOURCE3 9 GATE3
three electrically isolated independent N-channel
enhancement-mode DMOS transistors. Each transistor features integrated high-current zener diodes (ZCXa and ZCXb) to prevent gate damage in the event that an overstress condition occurs. These zener diodes also provide up to 4000 V of ESD protection when tested using the human-body model of a 100-pF capacitor in series
with a 1.5-kΩ resistor.
The TPIC5323L is offered in a standard 16-pin small-outline surface-mount (D) package and is characterized for operation over the case temperature of – 40°C to 125°C.
schematic
DRAIN1 12, 13
GATE2 5
DRAIN2 1, 2
GATE3 9
DRAIN3 6, 7
Q1
GATE1 16 ZC1b ZC1a
D1 Q2 Z1
ZC2b ZC2a
D2 Q3 Z2
ZC3b ZC3a
D3 Z3
14, 15
8
SOURCE1 GND
3, 4 SOURCE2
NOTE A: For correct operation, no terminal can be taken below GND.
10, 11 SOURCE3
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
•POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright © 1995, Texas Instruments Incorporated 1
TPIC5323L 3-CHANNEL INDEPENDENT GATE-PROTECTED
SLIS044A – NOVEMBER 1994 – REVISED SEPTEMBER 1995
absolute maximum ratings over operating case temperature range (unless otherwise noted)† Drain-to-source voltage, VDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 V Source-to-GND voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 V Drain-to-GND voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 V Gate-to-source voltage range, VGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 9 V to 18 V Continuous drain current, each output, TC = 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 A Continuous source-to-drain diode current, TC = 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 A Pulsed drain current, each output, Imax, TC = 25°C (see Note 1 and Figure 15) . . . . . . . . . . . . . . . . . . . . . 3 A Continuous gate-to-source zener diode current, TC = 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA Pulsed gate-to-source zener diode current, TC = 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 500 mA Single-pulse avalanche energy, EAS, TC = 25°C (see Figures 4 and 16) . . . . . . . . . . . . . . . . . . . . . . . 22.5 mJ Continuous total power dissipation, TC = 25°C (see Figure 15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.09 W Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 150°C Operating case temperature range, TC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 125°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: Pulse duration = 10 ms, duty cycle = 2%
•2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TPIC5323L 3-CHANNEL INDEPENDENT GATE-PROTECTED
SLIS044A – NOVEMBER 1994 – REVISED SEPTEMBER 1995
electrical characteristics, TC = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP MAX
V(BR)DSX Drain-to-source breakdown voltage VGS(th) Gate-to-source threshold voltage
ID = 250 µA,
ID = 1 mA, See Figure 5
VGS = 0 VDS = VGS,
60 1.5 1.8 .