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TLC5510A Datasheet PDF

Part Number TLC5510A
Description 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS
Manufacture etcTI
Total Page 21 Pages
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TLC5510A datasheet
TLC5510, TLC5510A
8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS
features
D Analog Input Range
– TLC5510 . . . 2 V Full Scale
– TLC5510A . . . 4 V Full Scale
D 8-Bit Resolution
D Integral Linearity Error
± 0.75 LSB Max (25°C)
± 1 LSB Max (– 20°C to 75°C)
D Differential Linearity Error
± 0.5 LSB Max (25°C)
± 0.75 LSB Max (– 20°C to 75°C)
D Maximum Conversion Rate
20 Mega-Samples per Second
(MSPS) Max
SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003
D 5-V Single-Supply Operation
D Low Power Consumption
TLC5510 . . . 127.5 mW Typ
TLC5510A . . . 150 mW Typ
(includes reference resistor dissipation)
D TLC5510 is Interchangeable With Sony
CXD1175
applications
D Digital TV
D Medical Imaging
D Video Conferencing
D High-Speed Data Conversion
D QAM Demodulators
description
PW OR NS PACKAGE†
(TOP VIEW)
The TLC5510 and TLC5510A are CMOS, 8-bit, 20
MSPS analog-to-digital converters (ADCs) that
OE 1
24 DGND
utilize a semiflash architecture. The TLC5510 and
DGND 2
23 REFB
TLC5510A operate with a single 5-V supply and
D1(LSB) 3
22 REFBS
typically consume only 130 mW of power.
D2 4
21 AGND
Included is an internal sample-and-hold circuit,
D3 5
20 AGND
parallel outputs with high-impedance mode, and
D4 6
19 ANALOG IN
internal reference resistors.
D5 7
18 VDDA
The semiflash architecture reduces power
consumption and die size compared to flash
converters. By implementing the conversion in a
2-step process, the number of comparators is
significantly reduced. The latency of the data
D6
D7
D8(MSB)
VDDD
CLK
8
9
10
11
12
17 REFT
16 REFTS
15 VDDA
14 VDDA
13 VDDD
output valid is 2.5 clocks.
Available in tape and reel only and ordered
The TLC5510 uses the three internal reference
resistors to create a standard, 2-V, full-scale
as the shown in the Available Options table
below.
conversion range using VDDA. Only external jumpers are required to implement this option and eliminates the
need for external reference resistors. The TLC5510A uses only the center internal resistor section with an
externally applied 4-V reference such that a 4-V input signal can be used. Differential linearity is 0.5 LSB at 25°C
and a maximum of 0.75 LSB over the full operating temperature range. Typical dynamic specifications include
a differential gain of 1% and differential phase of 0.7 degrees.
The TLC5510 and TLC5510A are characterized for operation from –20°C to 75°C.
TA
– 20°C to 75°C
AVAILABLE OPTIONS
PACKAGE
TSSOP (PW)
SOP (NS)
(TAPE AND REEL ONLY)
TLC5510IPW
TLC5510INSLE
– TLC5510AINSLE
MAXIMUM FULL-SCALE
INPUT VOLTAGE
2V
4V
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1994 – 2003, Texas Instruments Incorporated
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
1

TLC5510A datasheet
TLC5510, TLC5510A
8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS
SLAS095L SEPTEMBER 1994 REVISED JUNE 2003
functional block diagram
REFB
REFT
REFBS
AGND
AGND
Resistor
Reference
Divider
270
NOM
80
NOM
VDDA
REFTS
ANALOG IN
320
NOM
CLK
Clock
Generator
Lower Sampling
Comparators
(4-Bit)
Lower Sampling
Comparators
(4-Bit)
Upper Sampling
Comparators
(4-Bit)
Lower Encoder
(4-Bit)
Lower Encoder
(4-Bit)
Upper Encoder
(4-Bit)
OE
Lower Data
Latch
Upper Data
Latch
D1(LSB)
D2
D3
D4
D5
D6
D7
D8(MSB)
schematics of inputs and outputs
EQUIVALENT OF ANALOG INPUT
VDDA
EQUIVALENT OF EACH DIGITAL INPUT
VDDD
EQUIVALENT OF EACH DIGITAL OUTPUT
VDDD
ANALOG IN
AGND
OE, CLK
DGND
D1 D8
DGND
2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265




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