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TLC548I Datasheet PDF

Part Number TLC548I
Description 8-BIT ANALOG-TO-DIGITAL CONVERTERS
Manufacture etcTI
Total Page 19 Pages
PDF Download Download TLC548I Datasheet PDF

Features: Datasheet pdf D Microprocessor Peripheral or Standalon e Operation D 8-Bit Resolution A/D Conv erter D Differential Reference Input Vo ltages D Conversion Time . . . 17 µs M ax D Total Access and Conversion Cycles Per Second – TLC548 . . . up to 45 5 00 – TLC549 . . . up to 40 000 D On-C hip Software-Controllable Sample-and-Ho ld Function D Total Unadjusted Error . . . ± 0.5 LSB Max D 4-MHz Typical Inte rnal System Clock D Wide Supply Range . . . 3 V to 6 V D Low Power Consumption . . . 15 mW Max D Ideal for Cost-Effec tive, High-Performance Applications inc luding Battery-Operated Portable Instru mentation D Pinout and Control Signals Compatible With the TLC540 and TLC545 8 -Bit A/D Converters and with the TLC154 0 10-Bit A/D Converter D CMOS Technolog y TLC548C, TLC548I, TLC549C, TLC549I 8 -BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS067C – NOVEMBER 19 83 – REVISED SEPTEMBER 1996 D OR P PA CKAGE (TOP VIEW) REF + ANALOG IN REF GND 1 2 3 4 8 VCC 7 I/O CLOCK 6 DATA OUT 5 CS description The TLC548 .

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TLC548I datasheet
D Microprocessor Peripheral or Standalone
Operation
D 8-Bit Resolution A/D Converter
D Differential Reference Input Voltages
D Conversion Time . . . 17 µs Max
D Total Access and Conversion Cycles Per
Second
– TLC548 . . . up to 45 500
– TLC549 . . . up to 40 000
D On-Chip Software-Controllable
Sample-and-Hold Function
D Total Unadjusted Error . . . ± 0.5 LSB Max
D 4-MHz Typical Internal System Clock
D Wide Supply Range . . . 3 V to 6 V
D Low Power Consumption . . . 15 mW Max
D Ideal for Cost-Effective, High-Performance
Applications including Battery-Operated
Portable Instrumentation
D Pinout and Control Signals Compatible
With the TLC540 and TLC545 8-Bit A/D
Converters and with the TLC1540 10-Bit
A/D Converter
D CMOS Technology
TLC548C, TLC548I, TLC549C, TLC549I
8-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH SERIAL CONTROL
SLAS067C – NOVEMBER 1983 – REVISED SEPTEMBER 1996
D OR P PACKAGE
(TOP VIEW)
REF +
ANALOG IN
REF –
GND
1
2
3
4
8 VCC
7 I/O CLOCK
6 DATA OUT
5 CS
description
The TLC548 and TLC549 are CMOS analog-to-digital converter (ADC) integrated circuits built around an 8-bit
switched-capacitor successive-approximation ADC. These devices are designed for serial interface with a
microprocessor or peripheral through a 3-state data output and an analog input. The TLC548 and TLC549 use
only the input/output clock (I/O CLOCK) input along with the chip select (CS) input for data control. The
maximum I/O CLOCK input frequency of the TLC548 is 2.048 MHz, and the I/O CLOCK input frequency of the
TLC549 is specified up to 1.1 MHz.
AVAILABLE OPTIONS
PACKAGE
TA SMALL OUTLINE PLASTIC DIP
(D) (P)
0°C to 70°C
TLC548CD
TLC549CD
TLC548CP
TLC549CP
– 40°C to 85°C
TLC548ID
TLC549ID
TLC548IP
TLC549IP
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright © 1996, Texas Instruments Incorporated
1

TLC548I datasheet
TLC548C, TLC548I, TLC549C, TLC549I
8-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH SERIAL CONTROL
SLAS067C – NOVEMBER 1983 – REVISED SEPTEMBER 1996
description (continued)
Operation of the TLC548 and the TLC549 is very similar to that of the more complex TLC540 and TLC541
devices; however, the TLC548 and TLC549 provide an on-chip system clock that operates typically at 4 MHz
and requires no external components. The on-chip system clock allows internal device operation to proceed
independently of serial input/output data timing and permits manipulation of the TLC548 and TLC549 as desired
for a wide range of software and hardware requirements. The I/O CLOCK together with the internal system clock
allow high-speed data transfer and conversion rates of 45 500 conversions per second for the TLC548, and
40 000 conversions per second for the TLC549.
Additional TLC548 and TLC549 features include versatile control logic, an on-chip sample-and-hold circuit that
can operate automatically or under microprocessor control, and a high-speed converter with differential
high-impedance reference voltage inputs that ease ratiometric conversion, scaling, and circuit isolation from
logic and supply noises. Design of the totally switched-capacitor successive-approximation converter circuit
allows conversion with a maximum total error of ± 0.5 least significant bit (LSB) in less than 17 µs.
The TLC548C and TLC549C are characterized for operation from 0°C to 70°C. The TLC548I and TLC549I are
characterized for operation from – 40°C to 85°C.
functional block diagram
REF +
REF –
1
3
2
ANALOG IN
Sample
and
Hold
8-Bit
Analog-to
Digital
Converter
(Switched-
Capacitors)
8
Output
Data
Regiser
8
8-to-1 Data
4
Selector
6 DATA
and OUT
Driver
CS
I/O CLOCK
5
7
Internal
System
Clock
Control
Logic and
Output Counter
typical equivalent inputs
INPUT CIRCUIT IMPEDANCE DURING SAMPLING MODE
ANALOG IN
1 kTYP
Ci = 60 pF TYP
(equivalent input
capacitance)
INPUT CIRCUIT IMPEDANCE DURING HOLD MODE
ANALOG IN
5 MTYP
2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265




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