(PDF) UC3572 Datasheet PDF | Unitrode





UC3572 Datasheet PDF

Part Number UC3572
Description Negative Output Flyback Pulse Width Modulator
Manufacture Unitrode
Total Page 9 Pages
PDF Download Download UC3572 Datasheet PDF

Features: Datasheet pdf Negative Output Flyback Pulse Width Modu lator UC1572 UC2572 UC3572 FEATURES Simple Single Inductor Flyback PWM f or Negative Voltage Generation • Driv es External PMOS Switch • Contains UV LO Circuit • Includes Pulse-by-Pulse Current Limit • Low 50µA Sleep Mode Current DESCRIPTION The UC3572 is a ne gative output flyback pulse width modul ator which converts a positive input vo ltage to a regulated negative output vo ltage. The chip is optimized for use in a single inductor negative flyback swi tching converter employing an external PMOS switch. The block diagram consists of a precision reference, an error amp lifier configured for voltage mode oper ation, an oscillator, a PWM comparator with latching logic, and a 0.5A peak ga te driver. The UC3572 includes an under voltage lockout circuit to insure suffi cient input supply voltage is present b efore any switching activity can occur, and a pulse-by-pulse current limit. Ou tput current can be sensed and limited to a user determined maximum value..

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UC3572 datasheet
Negative Output Flyback Pulse Width Modulator
UC1572
UC2572
UC3572
FEATURES
Simple Single Inductor Flyback PWM
for Negative Voltage Generation
Drives External PMOS Switch
Contains UVLO Circuit
Includes Pulse-by-Pulse Current Limit
Low 50µA Sleep Mode Current
DESCRIPTION
The UC3572 is a negative output flyback pulse width modulator which con-
verts a positive input voltage to a regulated negative output voltage. The
chip is optimized for use in a single inductor negative flyback switching con-
verter employing an external PMOS switch. The block diagram consists of
a precision reference, an error amplifier configured for voltage mode opera-
tion, an oscillator, a PWM comparator with latching logic, and a 0.5A peak
gate driver. The UC3572 includes an undervoltage lockout circuit to insure
sufficient input supply voltage is present before any switching activity can
occur, and a pulse-by-pulse current limit. Output current can be sensed and
limited to a user determined maximum value. The UVLO circuit turns the
chip off when the input voltage is below the UVLO threshold. In addition, a
sleep comparator interfaces to the UVLO circuit to turn the chip off. This re-
duces the supply current to only 50µA, making the UC3572 ideal for battery
powered applications.
BLOCK DIAGRAM
SLUS275A - MARCH 1999 - REVISED AUGUST 2001
UDG-94094-2

UC3572 datasheet
ABSOLUTE MAXIMUM RATINGS
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35V
EAINV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.6V to VCC
IEAOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25mA
RAMP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 4V
CS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC
Iout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.7A to 0.7A
I3VREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -15mA
Storage Temperature . . . . . . . . . . . . . . . . . . . -65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . -65°C to +150°C
Lead Temperature (Soldering, 10 sec.) . . . . . . . . . . . . . +300°C
Currents are positive into, negative out of the specified
terminal. Consult Packaging Section of Databook for thermal
limitations and considerations of packages.
CONNECTION DIAGRAM
DIL-8, SOIC-8 (TOP VIEW)
D, N or J Packages
ORDERING INFORMATION
UC1572
UC2572
UC3572
TEMPERATURE RANGE
–55°C to +125°C
–40°C to +85°C
0°C to +70°C
PACKAGE
J
D, N or J
D or N
UC1572
UC2572
UC3572
ELECTRICAL CHARACTERISTICS: Unless otherwise specified, VCC = 5V, CT = 680pF, TA = TJ.
PARAMETER
TEST CONDITIONS
MIN TYP
Reference Section
3VREF
2.94 3
Line Regulation
VCC = 4.75 to 30V
1
Load Regulation
I3VREF = 0V to –5mA
1
Oscillator Section
Frequency
VCC = 5V to 30V
85 100
Error Amp Section
EAINV
EAOUT = 2V
–10 0
IEANV = –1mA
–0.2
IEAINV
EAOUT = 2V
–0.2
AVOL
EAOUT = 0.5V to 3V
65 90
EAOUT High
EAINV = –100mV
3.6 4
EAOUT Low
EAINV = 100mV
0.1
IEAOUT
EAINV = –100mV, EAOUT = 2V
–350 –500
EAINV = 100mV, EAOUT = 2V
7 20
Unity Gain Bandwidth
TJ = 25°C, F = 10kHz
0.6 1
Current Sense Comparator Section
Threshold
0.185 0.205
Input Bias Current
CS = 0
–0.4
CS Propogation Delay
300
MAX UNITS
3.06
10
10
V
mV
mV
115 kHz
10 mV
–0.9 V
–1.0 A
dB
4.4 V
0.2 V
µA
mA
MHz
0.225
–1
V
µA
nS
2




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