CD54HC10

CD74HC10, CD54HC10 SCHS128D – AUGUST 1997 – REVISED JULY 2021 CDx4HC10 Triple 3-Input NAND Gates 1 Features Buffered inputs Wide operating voltage range: 2 V to 6 V Wide operating temperature range: -55°C to +125°C Supports fanout up to 10 LSTTL loads Significant power reduction compared to LSTTL logic ICs 2 Applications Alarm / tamper detect circuit S-R latch 1A 1 1B 2 2A 3 2B 4 2C 5 2Y 6 GND 7 3 Description This device contains three independent 3-input NAND gates. Each gate performs the Boolean function Y = A ● B ● C in positive logic. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) CD74HC10M SOIC (14) 8.70 mm × 3.90 mm CD74HC10E PDIP (14) 19.30 mm × 6.40 mm CD54HC10F CDIP (14) 21.30 mm × 7.60 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 14 VCC 13 1C 12 1Y 11 3C 10 3B 9 3A 8 3Y Functional Pinout An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. CD74HC10, CD54HC10 SCHS128D – AUGUST 1997 – REVISED JULY 2021 www.ti.com Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revis...