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ADC081S051 Dataheets PDF



Part Number ADC081S051
Manufacturers Texas Instruments
Logo Texas Instruments
Description Single Channel 200 to 500ksps 8-Bit A/D Converter
Datasheet ADC081S051 DatasheetADC081S051 Datasheet (PDF)

ADC081S051 www.ti.com SNAS309F – APRIL 2005 – REVISED JANUARY 2014 ADC081S051 Single Channel, 200 to 500 ksps, 8-Bit A/D Converter Check for Samples: ADC081S051 FEATURES 1 •2 Specified Over a Range of Sample Rates • 6-lead WSON and SOT-23 Packages • Variable Power Management • Single Power Supply with 2.7V - 5.25V Range • SPI™/QSPI™/MICROWIRE/DSP Compatible KEY SPECIFICATIONS • DNL: +0.06 / -0.045 LSB (Typ) • INL: +0.06 / -0.05 LSB (Typ) • SNR: 49.6 dB (Typ) • Power Consumption: – 3.6V Suppl.

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ADC081S051 www.ti.com SNAS309F – APRIL 2005 – REVISED JANUARY 2014 ADC081S051 Single Channel, 200 to 500 ksps, 8-Bit A/D Converter Check for Samples: ADC081S051 FEATURES 1 •2 Specified Over a Range of Sample Rates • 6-lead WSON and SOT-23 Packages • Variable Power Management • Single Power Supply with 2.7V - 5.25V Range • SPI™/QSPI™/MICROWIRE/DSP Compatible KEY SPECIFICATIONS • DNL: +0.06 / -0.045 LSB (Typ) • INL: +0.06 / -0.05 LSB (Typ) • SNR: 49.6 dB (Typ) • Power Consumption: – 3.6V Supply: 1.6 mW (Typ) – 5.25V Supply: 8.5 mW (Typ) APPLICATIONS • Portable Systems • Remote Data Acquisition • Instrumentation and Control Systems DESCRIPTION The ADC081S051 is a low-power, single channel CMOS 8-bit analog-to-digital converter with a highspeed serial interface. Unlike the conventional practice of specifying performance at a single sample rate only, the ADC081S051 is fully specified over a sample rate range of 200 ksps to 500 ksps. The converter is based on a successive-approximation register architecture with an internal track-and-hold circuit. The output serial data is straight binary, and is compatible with several standards, such as SPI™, QSPI™, MICROWIRE, and many common DSP serial interfaces. The ADC081S051 operates with a single supply that can range from +2.7V to +5.25V. Normal power consumption using a +3.6V or +5.25V supply is 1.6 mW and 8.5 mW, respectively. The power-down feature reduces the power consumption to as low as 2.6 µW using a +5.25V supply. The ADC081S051 is packaged in 6-lead WSON and SOT-23 packages. Operation over the industrial temperature range of −40°C to +85°C is ensured. Table 1. Pin-Compatible Alternatives by Resolution and Speed(1) Resolution 12-bit 10-bit 8-bit 50 to 200 ksps ADC121S021 ADC101S021 ADC081S021 Specified for Sample Rate Range of: 200 to 500 ksps ADC121S051 ADC101S051 ADC081S051 500 ksps to 1 Msps ADC121S101 ADC081S101 ADC081S101 (1) All devices are fully pin and function compatible. Connection Diagram VA GND 16 2 ADC081S051 5 CS SDATA VIN 3 4 SCLK Figure 1. 6-Lead WSON or SOT-23 See NGF0006A or DBV Package 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. 2 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2005–2014, Texas Instruments Incorporated ADC081S051 SNAS309F – APRIL 2005 – REVISED JANUARY 2014 Block Diagram VIN T/H 8-BIT SUCCESSIVE APPROXIMATION ADC www.ti.com CONTROL LOGIC SCLK CS SDATA Pin No. Symbol ANALOG I/O 3 DIGITAL I/O VIN 4 SCLK 5 SDATA 6 CS POWER SUPPLY 1 2 PAD VA GND GND PIN DESCRIPTIONS and EQUIVALENT CIRCUITS Description Analog input. This signal can range from 0V to VA. Digital clock input. This clock directly controls the conversion and readout processes. Digital data output. The output samples are clocked out of this pin on falling edges of the SCLK pin. Chip select. On the falling edge of CS, a conversion process begins. Positive supply pin. This pin should be connected to a quiet +2.7V to +5.25V source and bypassed to GND with a 1 µF capacitor and a 0.1 µF monolithic capacitor located within 1 cm of the power pin. The ground return for the supply and signals. For package suffix CISD(X) only, it is recommended that the center pad should be connected to ground. 2 Submit Documentation Feedback Copyright © 2005–2014, Texas Instruments Incorporated Product Folder Links: ADC081S051 ADC081S051 www.ti.com SNAS309F – APRIL 2005 – REVISED JANUARY 2014 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings(1)(2)(3) Analog Supply Voltage VA Voltage on Any Analog Pin to GND Voltage on Any Digital Pin to GND Input Current at Any Pin(4) Package Input Current(4) Power Consumption at TA = 25°C ESD Susceptibility(6) Junction Temperature Storage Temperature Human Body Model Machine Model −0.3V to 6.5V −0.3V to (VA +0.3V) −0.3V to 6.5V ±10 mA ±20 mA See (5) 3500V 300V +150°C −65°C to +150°C (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the liste.


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