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Reference Design
DAC7562T, DAC7563T, DAC8162T DAC8163T, DAC8562T, DAC8563T
SLASE61A – SEPTEMBER 2015 – REVISED OCTOBER 2015
DACxx6xT Dual 16-, 14-, 12-Bit, Low-Power, Voltage-Output DACs With 2.5-V, 4-PPM/°C Internal Reference, and 5-V TTL I/O
1 Features
•1 Relative Accuracy: 4 LSB INL at 16 Bits • Low Glitch Impulse: 0.1 nV-s • Bidirectional Reference Pin: Input or 2.5-V Output
– 4-ppm/°C Temperature Drift (Typ) • Power-On Reset to Zero Scale or Mid-Scale • Low-Power: 4 mW at 5-V AVDD • Wide Power-Supply Range: 2.7 V to 5.5 V • 50-MHz SPI With Schmitt-Triggered Inputs • LDAC and CLR Functions • Output Buffer With Rail-to-Rail Operation • Pin-to-Pin Compatible With DAC8562 Family • 5-V TTL I/O Enabled • Packages: WSON-10 (3 mm × 3 mm), VSSOP-10 • Temperature Range: –40°C to 125°C
2 Applications
• Portable Instrumentation • PLC Analog Output Module • Bipolar Outputs (Section 9.2.2) • Closed-Loop Servo Control • Voltage Controlled Oscillator Tuning • Data Acquisition Systems • Programmable Gain and Offset Adjustment
3 Description
The DAC856xT, DAC816xT, and DAC756xT devices are low-power, voltage-output, dual-channel, 16-, 14-, and 12-bit digital-to-analog converters (DACs), respectively. These devices include a 2.5-V, 4-ppm/°C internal reference, giving a full-scale output voltage range of 2.5 V or 5 V. The internal reference has an initial accuracy of ±5 mV and can source or sink up to 20 mA at the VREFIN/VREFOUT pin.
These devices are monotonic, providing excellent linearity and minimizing undesired code-to-code transient voltages (glitch). They use a versatile threewire serial interface that operates at clock rates up to 50 MHz. The interface is compatible with standard SPI™, QSPI™, Microwire, and digital signal processor (DSP) interfaces. The DACxx62T devices incorporate a power-on-reset circuit that ensures the DAC output powers up and remains at zero scale until a valid code is written to the device, whereas the DACxx63T devices similarly power up at mid-scale. These devices contain a power-down feature that reduces current consumption to typically 550 nA at 5 V. The low power consumption, internal reference, and small footprint make these devices ideal for portable, battery-operated equipment.
The DACxx62T devices are drop-in and functioncompatible with each other, as are the DACxx63T devices. The entire family is available in VSSOP-10 and WSON-10 packages.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
DAC8562T DAC8162T DAC7562T
VSSOP (10), WSON (10)
3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
GND
AVDD
Simplified Block Diagram
LDAC
CLR
VREFIN/VREFOUT
DIN SCLK SYNC
Input Control Logic
Buffer Control
Register Control
Control Logic
2.5-V Reference
PowerDown Control Logic
Data Buffer B
DAC Register B
DAC
VOUTB
DAC756xT (12-Bit) DAC816xT (14-Bit) DAC856xT (16-Bit)
Data Buffer A
DAC Register A
DAC
VOUTA
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.
DAC7562T, DAC7563T, DAC8162T DAC8163T, DAC8562T, DAC8563T
SLASE61A – SEPTEMBER 2015 – REVISED OCTOBER 2015
www.ti.com
Table of Contents
1 Features .................................................................. 1 2 Applications ........................................................... 1 3 Description ............................................................. 1 4 Revision History..................................................... 2 5 Device Comparison Table..................................... 3 6 Pin Configuration and Functions ......................... 4 7 Specifications......................................................... 5
7.1 Absolute Maximum Ratings ...................................... 5 7.2 ESD Ratings ............................................................ 5 7.3 Recommended Operating Conditions....................... 5 7.4 Thermal Information .................................................. 5 7.5 Electrical Characteristics........................................... 6 7.6 Timing Requirements ................................................ 9 7.7 Typical Characteristics ............................................ 10 8 Detailed Description ............................................ 28 8.1 Overview ................................................................. 28 8.2 Functional Block Diagram ....................................... 28 8.3 Feature Description................................................. 28
8.4 Device Functional Modes........................................ 32 8.5 Programming........................................................... 36 9 Application and Implementation ...................