Document
MSP430G2x31 MSP430G2x21
www.ti.com
SLAS694J – FEBRUARY 2010 – REVISED FEBRUARY 2013
MIXED SIGNAL MICROCONTROLLER
FEATURES
1
• Low Supply-Voltage Range: 1.8 V to 3.6 V • Ultra-Low Power Consumption
– Active Mode: 220 µA at 1 MHz, 2.2 V – Standby Mode: 0.5 µA – Off Mode (RAM Retention): 0.1 µA • Five Power-Saving Modes • Ultra-Fast Wake-Up From Standby Mode in Less Than 1 µs • 16-Bit RISC Architecture, 62.5-ns Instruction Cycle Time • Basic Clock Module Configurations – Internal Frequencies up to 16 MHz With
One Calibrated Frequency – Internal Very Low Power Low-Frequency
(LF) Oscillator – 32-kHz Crystal – External Digital Clock Source
• 16-Bit Timer_A With Two Capture/Compare Registers
• Universal Serial Interface (USI) Supporting SPI and I2C (See Table 1)
• Brownout Detector
• 10-Bit 200-ksps A/D Converter With Internal Reference, Sample-and-Hold, and Autoscan (See Table 1)
• Serial Onboard Programming, No External Programming Voltage Needed, Programmable Code Protection by Security Fuse
• On-Chip Emulation Logic With Spy-Bi-Wire Interface
• For Family Members Details, See Table 1
• Available in 14-Pin Plastic Small-Outline Thin Package (TSSOP) (PW), 14-Pin Plastic Dual Inline Package (PDIP) (N), and 16-Pin QFN Package (RSA)
• For Complete Module Descriptions, See the MSP430x2xx Family User’s Guide (SLAU144)
DESCRIPTION
The Texas Instruments MSP430 family of ultra-low-power microcontrollers consists of several devices featuring different sets of peripherals targeted for various applications. The architecture, combined with five low-power modes, is optimized to achieve extended battery life in portable measurement applications. The device features a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code efficiency. The digitally controlled oscillator (DCO) allows wake-up from low-power modes to active mode in less than 1 µs.
The MSP430G2x21/G2x31 series is an ultra-low-power mixed signal microcontroller with a built-in 16-bit timer and ten I/O pins. The MSP430G2x31 family members have a 10-bit A/D converter and built-in communication capability using synchronous protocols (SPI or I2C). For configuration details, see Table 1.
Typical applications include low-cost sensor systems that capture analog signals, convert them to digital values, and then process the data for display or for transmission to a host system.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 2010–2013, Texas Instruments Incorporated
MSP430G2x31 MSP430G2x21
SLAS694J – FEBRUARY 2010 – REVISED FEBRUARY 2013
www.ti.com
Table 1. Available Options(1)
Device
MSP430G2231IRSA16 MSP430G2231IPW14 MSP430G2231IN14
MSP430G2221IRSA16 MSP430G2221IPW14 MSP430G2221IN14
MSP430G2131IRSA16 MSP430G2131IPW14 MSP430G2131IN14
MSP430G2121IRSA16 MSP430G2121IPW14 MSP430G2121IN14
BSL EEM
Flash (KB)
-1
2
-1
2
-1
1
-1
1
RAM (B)
Timer_A
USI
ADC10 Channel
Clock
128 1x TA2 1
8 LF, DCO, VLO
128 1x TA2 1
- LF, DCO, VLO
128 1x TA2 1
8 LF, DCO, VLO
128 1x TA2 1
- LF, DCO, VLO
I/O
Package Type (2)
16-QFN 10 14-TSSOP
14-PDIP
16-QFN 10 14-TSSOP
14-PDIP
16-QFN 10 14-TSSOP
14-PDIP
16-QFN 10 14-TSSOP
14-PDIP
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
2 Submit Documentation Feedback
Copyright © 2010–2013, Texas Instruments Incorporated
www.ti.com
Device Pinout, MSP430G2x21
MSP430G2x31 MSP430G2x21
SLAS694J – FEBRUARY 2010 – REVISED FEBRUARY 2013
N OR PW PACKAGE (TOP VIEW)
DVCC P1.0/TA0CLK/ACLK
P1.1/TA0.0 P1.2/TA0.1
P1.3 P1.4/ SMCLK /T CK P1.5/TA0.0/SCLK/TMS
1 2 3 4 5 6 7
14 DVSS 13 XIN/P2.6/TA0.1 12 XOUT/P2.7 11 TEST/SBWTCK 10 RST/NMI/SBWTDIO 9 P1.7/SDI/SDA/TDO/TDI 8 P1.6/TA0.1/SDO/SCL/TDI/TCLK
NOTE: See port schematics in Application Information for detailed I/O information.
RSA PACKAGE (TOP VIEW)
DVCC DVCC DVSS DVSS
P1.0/TA0CLK/ACLK P1.1/TA0.0 P1.2/TA0.1 P1.3
16 15 14 13 1 12
2 11
3 10
49 5678
XIN/P2.6/TA0.1 XOUT/P2.7 TEST/SBWTCK RST/NMI/SBWTDIO
P1.4/SMCLK/TCK P1.5/TA0.0/SCLK/TMS P1.6/TA0.1/SDO/SCL/TDI/TCLK P1.7/SDI/SDA/TDO/TDI
NOTE: See port schematics in Application Information for detailed I/O information.
Copyright © 2010–2013, Texas Instruments Incorporated
Submit Documentation Feedback
3
MSP430G2x31 MSP430G2x21
SLAS694J – FEBRUARY 2010 – REVISED FEBRUARY 2013
Device Pinout, MSP.