High-Speed CMOS Logic 4-Bit Magnitude Comparator
CD54HC85, CD74HC85, CD54HCT85, CD74HCT85
SCHS136F – AUGUST 1997 – REVISED FEBRUARY 2022
CDx4HC85, CDx4HCT85 High-Speed C...
Description
CD54HC85, CD74HC85, CD54HCT85, CD74HCT85
SCHS136F – AUGUST 1997 – REVISED FEBRUARY 2022
CDx4HC85, CDx4HCT85 High-Speed CMOS Logic 4-Bit Magnitude Comparator
1 Features
Buffered inputs and outputs Typical propagation delay: 13 ns (data to output at
VCC = 5 V, CL = 15 pF, TA = 25℃) Serial or parallel expansion without external gating Fanout (over temperature range)
– Standard outputs: 10 LSTTL loads – Bus driver outputs: 15 LSTTL loads Wide operating temperature range: –55℃ to 125℃ Balanced propagation delay and transition times Significant power reduction compared to LSTTL Logic ICs HC types
– 2 V to 6 V operation – High noise immunity: NIL = 30%, NIH = 30% of
VCC at VCC = 5 V HCT types
– 4.5 V to 5.5 V operation – Direct LSTTL input logic compatibility,
VIL = 0.8 V (max), VIH = 2 V (min) – CMOS input compatibility, II ≤ 1 μA at VOL, VOH
2 Description
The ’HC85 and ’HCT85 are high speed magnitude comparators that use silicon-gate CMOS technology to achieve operating speeds similar to LSTTL with the low power consumption of standard CMOS integrated circuits.
These 4-bit devices compare two binary, BCD, or other monotonic codes and present the three possible magnitude results at the outputs (A > B, A < B, and A = B). The 4-bit input words are weighted (A0 to A3 and B0 to B3), where A3 and B3 are the most significant bits.
PART NUMBER CD54HC85F3A CD54HCT85F3A CD74HC85M CD74HCT85M CD74HC85E CD74HCT85E CD74HC85NS CD74HC85PW
Device Information
PACKAGE(1) BODY...
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