CD54HCT03

Data sheet acquired from Harris Semiconductor SCHS126D February 1998 - Revised September 2003 CD54HC03, CD74HC03, CD54HCT03, CD74HCT03 High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain [ /Title (CD74H C03, CD74H CT03) /Subject (High Speed CMOS Logic Quad 2Input Features Description Buffered Inputs Typical Propagation Delay: CL = 15pF, TA = 25oC 8ns at VCC = 5V, Output Pull-up to 10V Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads Wide Operating Temperature Range . . . -55oC to 125oC Balanced Propagation Delay and Transition Times Significant Power Reduction Compared to LSTTL Logic ICs HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH The ’HC03 and ’HCT03 logic gates utilize silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the low power consumption of standard CMOS integrated circuits. All devices have the ability to drive 10 LSTTL loads. The HCT logic family is functionally as well as pin compatible with the standard LS logic family. These open drain NAND gates can drive into resistive loads to output voltages as high as 10V. Minimum values of RL required versus load voltage are shown in Fi...