CD54HCT238

CD54HC138, CD74HC138, CD54HCT138, CD74HCT138, CD54HC238, CD74HC238, CD54HCT238, CD74HCT238 SCHS147J – NOVEMBER 1998 – REVISED NOVEMBER 2021 CDx4HC138, CDx4HCT138, CDx4HC238, CDx4HCT238 High-Speed CMOS Logic 3- to 8-Line Decoder/Demultiplexer Inverting and Noninverting 1 Features Select one of eight data outputs: – Active low for '138 – Active high for '238 l/O port or memory selector Three enable inputs to simplify cascading Typical propagation delay of 13 ns at VCC = 5 V, CL = 15 pF, TA = 25°C Fanout (over temperature range) – Bus driver outputs: 15 LSTTL loads – Standard outputs: 10 LSTTL loads Wide operating temp range: -55°C to 125°C Balanced propagation delay and transition times Significant power reduction compared to LSTTL logic ICs HC types – 2 V to 6 V operation – High noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5 V HCT types – 4.5-V to 5.5-V operation – Direct LSTTL input logic compatibility, VIL= 0.8 V (Max), VIH = 2 V (Min) – CMOS input compatibility, Il ≤ 1µA at VOL, VOH 3:8 DECODER OUTPUT ENABLE 000 A0 Y0 001 A1 Y1 010 A2 Y2 011 G0 Y3 100 G1 Y4 101 G2 Y5 110 Y6 111 Y7 2 Description The CDx4HC(T)138 and '238 are three to eight decoders with one standard output strobe (G2) and two active low output strobes (G 1 and G 0). When the outputs are gated by any of the strobe inputs, they are all forced into the high state. When the outputs are not disabled by the strobe inputs, only the selected output is low while al...