Document
TIBPAL20L8-15C, TIBPAL20R4-15C, TIBPAL20R6-15C, TIBPAL20R8-15C TIBPAL20L8-20M, TIBPAL20R4-20M, TIBPAL20R6-20M, TIBPAL20R8-20M
HIGH-PERFORMANCE IMPACT ™ PAL® CIRCUITS SRPS021A − D2920, JUNE 1986 − REVISED DECEMBER 2010
• High-Performance: fmax (w/o feedback)
TIBPAL20R’ -15C Series . . . 45 MHz TIBPAL20R’ -20M Series . . . 41.6 MHz
• High-Performance . . . 45 MHz Min • Reduced ICC of 180 mA Max • Functionally Equivalent, but Faster Than
PAL20L8, PAL20R4, PAL20R6, PAL20R8
• Power-Up Clear on Registered Devices (All
Register Outputs are Set Low, but Voltage Levels at the Output Pins Go High)
• Preload Capability on Output Registers
Simplifies Testing
• Package Options Include Both Plastic and
Ceramic Chip Carriers in Addition to Plastic and Ceramic DIPs
DEVICE
PAL20L8 PAL20R4 PAL20R6 PAL20R8
I INPUTS
14 12 12 12
3-STATE O OUTPUTS
2 0 0 0
REGISTERED Q OUTPUTS
0 4 (3-state buffers) 6 (3-state buffers) 8 (3-state buffers)
I/O PORT
S 6 4 2 0
description These programmable array logic devices feature high speed and functional equivalency when compared with currently available devices. These IMPACT™ circuits combine the latest Advanced Low-Power Schottky technology with proven titanium-tungsten fuses to provide reliable, high-performance substitutes for conventional TTL logic. Their easy programmability allows for quick design of custom functions and typically results in a more compact circuit board. In addition, chip carriers are available for futher reduction in board space.
TIBPAL20L8’ C SUFFIX . . . JT OR NT PACKAGE M SUFFIX . . . JT OR W PACKAGE
(TOP VIEW)
I I I I I I I I I I I GND
1 2 3 4 5 6 7 8 9 10 11 12
24 VCC 23 I 22 O 21 I/O 20 I/O 19 I/O 18 I/O 17 I/O 16 I/O
15 O
14 I
13 I
TIBPAL20L8’ C SUFFIX . . . FN PACKAGE M SUFFIX . . . FK PACKAGE
(TOP VIEW)
II II GND I NC NC I VCC II OO
I
54
32 1
28 27 26 25
I/O
I6
24 I/O
I7
23 I/O
NC 8
22 NC
I9
21 I/O
I 10
20 I/O
I 11
19 I/O
12 13 14 15 16 17 18
NC − No internal connection
Pin assignments in operating mode
Extra circuitry has been provided to allow loading of each register asynchronously to either a high or low state. This feature simplifies testing because the registers can be set to an initial state prior to executing the test sequence.
The TIBPAL20’ C series is characterized from 0°C to 75°C. The TIBPAL20’ M series is characterized for operation over the full military temperature range of −55°C to 125°C.
IMPACT is a trademark of Texas Instruments Incorporated. PAL is a registered trademark of Advanced Micro Devices Inc.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
•POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright © 2010, Texas Instruments Incorporated 1
TIBPAL20R4-15C, TIBPAL20R6-15C, TIBPAL20R8-15C TIBPAL20R4-20M, TIBPAL20R6-20M, TIBPAL20R8-20M HIGH-PERFORMANCE IMPACT ™ PAL® CIRCUITS
SRPS021A − D2920, JUNE 1986 − REVISED DECEMBER 2010
TIBPAL20R4’ C SUFFIX . . . JT OR NT PACKAGE M SUFFIX . . . JT OR W PACKAGE
(TOP VIEW)
TIBPAL20R4’ C SUFFIX . . . FN PACKAGE M SUFFIX . . . FK PACKAGE
(TOP VIEW)
I I CLK NC VCC I I/O
CLK I I I I I I I I I I
GND
1 2 3 4 5 6 7 8 9 10 11 12
24 VCC 23 I 22 I/O 21 I/O 20 Q 19 Q 18 Q 17 Q 16 I/O 15 I/O 14 I 13 OE
4 3 2 1 28 27 26
I5
25 I/O
I6
24 Q
I7
23 Q
NC 8
22 NC
I9
21 Q
I 10
20 Q
I 1112 13 14 15 16 17 1819 I/O
I I GND NC OE I I/O
TIBPAL20R6’ C SUFFIX . . . JT OR NT PACKAGE M SUFFIX . . . JT OR W PACKAGE
(TOP VIEW)
CLK I I I I I I I I I I
GND
1 2 3 4 5 6 7 8 9 10 11 12
24 VCC 23 I 22 I/O 21 Q 20 Q 19 Q 18 Q 17 Q 16 Q 15 I/O 14 I 13 OE
TIBPAL20R6’ C SUFFIX . . . FN PACKAGE M SUFFIX . . . FK PACKAGE
(TOP VIEW)
I I CLK NC VCC I I/O
4 3 2 1 28 27 26
I5
25 Q
I6
24 Q
I7
23 Q
NC 8
22 NC
I9
21 Q
I 10
20 Q
I 1112 13 14 15 16 17 1819 Q
I I GND NC OE I I/O
TIBPAL20R8’ C SUFFIX . . . JT OR NT PACKAGE M SUFFIX . . . JT OR W PACKAGE
(TOP VIEW)
CLK I I I I I I I I I I
GND
1 2 3 4 5 6 7 8 9 10 11 12
24 VCC 23 I 22 Q 21 Q 20 Q 19 Q 18 Q 17 Q 16 Q 15 Q 14 I 13 OE
Pin assignments in operating mode
TIBPAL20R8’ C SUFFIX . . . FN PACKAGE M SUFFIX . . . FK PACKAGE
(TOP VIEW)
I I CLK NC VCC I Q
4 3 2 1 28 27 26
I5
25 Q
I6
24 Q
I7
23 Q
NC 8
22 NC
I9
21 Q
I 10
20 Q
I 1112 13 14 15 16 17 1819 Q
I I GND NC OE I Q
NC − No internal connection
•2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TIBPAL20L8-15C, TIBPAL20R4-15C TIBPAL20L8-20M, TIBPAL20R4-20M HIGH-PERFORMANCE IMPACT ™ PAL® CIRCUITS
SRPS021A − D2920, JUNE 1986 − REVISED DECEMBER 2010
functional block diagrams (positive logic)
TIBPAL20L8’
& 40 X 64 7
EN ≥ 1
O
I 14
20 x 20
6 20
7 7 7 7 7 7 7
O I/O I/O I/O I/O I/O I/O
6
OE CLK
TIBPAL20R4’
& 40 X 64
8 8
≥1
EN 2 C1
I=0 2 1D
I 12 4
20 x 20
4 20
8 8 7 EN ≥ 1 7
7
7
4 4
de.