CYW4354 MAC/Baseband/Radio Datasheet

CYW4354 Datasheet PDF, Equivalent


Part Number

CYW4354

Description

Single-Chip 5G Wi-Fi IEEE 802.11ac 22 MAC/Baseband/Radio

Manufacture

Cypress Semiconductor

Total Page 30 Pages
PDF Download
Download CYW4354 Datasheet PDF


CYW4354
CYW4354
Single-Chip 5G Wi-Fi IEEE 802.11ac 2×2 MAC/Baseband/
Radio with Integrated Bluetooth 4.1 and FM Receiver
The Cypress CYW4354 is a complete dual–band (2.4 GHz and 5 GHz) 5G Wi–Fi 2 × 2 MIMO® MAC/PHY/Radio System–on–a–Chip.
This Wi–Fi single–chip device provides a high level of integration with dual–stream IEEE 802.11ac MAC/baseband/radio, Bluetooth
4.1, and FM radio receiver. In IEEE 802.11ac mode, the WLAN operation supports rates of MCS0–MCS9 (up to 256 QAM) in 20 MHz,
40 MHz, and 80 MHz channels for data rates up to 867 Mbps. In addition, all the rates specified in IEEE 802.11a/b/g/n are supported.
Included on–chip are 2.4 GHz and 5 GHz transmit power amplifiers and receive low noise amplifiers.
For the WLAN section, several alternative host interface options are included: an SDIO v3.0 interface that can operate in 4b or 1b
modes, a high-speed inter-chip (HSIC) interface, and a PCIe v3.0 compliant interface running at Gen1 speeds. For the Bluetooth
section, host interface options of a high-speed 4-wire UART and USB 2.0 full-speed (12 Mbps) are provided.
The CYW4354 uses advanced design techniques and process technology to reduce active and idle power, and includes an embedded
power management unit that simplifies the system power topology.
In addition, the CYW4354 implements highly sophisticated enhanced collaborative coexistence hardware mechanisms and algorithms
that ensure that WLAN and Bluetooth collaboration is optimized for maximum performance. Coexistence support for external radios
(such as LTE cellular and GPS) is provided via an external interface. As a result, enhanced overall quality for simultaneous voice,
video, and data transmission on a handheld system is achieved.
Cypress Part Numbering Scheme
Cypress is converting the acquired IoT part numbers from Broadcom to the Cypress part numbering scheme. Due to this conversion,
there is no change in form, fit, or function as a result of offering the device with Cypress part number marking. The table provides
Cypress ordering part number that matches an existing IoT part number.
Table 1. Mapping Table for Part Number between Broadcom and Cypress
Broadcom Part Number
BCM4354
BCM4354XKUBG
BCM4354KKWBG
CYW4354
CYW4354XKUBG
CYW4354KKWBG
Cypress Part Number
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 002-14809 Rev. *L
• San Jose, CA 95134-1709 • 408-943-2600
Revised Wednesday, February 7, 2018

CYW4354
CYW4354
Features
IEEE 802.11X Key Features
IEEE 802.11ac Draft compliant.
Dual–stream spatial multiplexing up to 867 Mbps data rate.
Supports 20, 40, and 80 MHz channels with optional SGI (256
QAM modulation).
Full IEEE 802.11a/b/g/n legacy compatibility with enhanced
performance.
TX and RX low–density parity check (LDPC) support for
improved range and power efficiency.
Supports IEEE 802.11ac/n beamforming.
On–chip power amplifiers and low–noise amplifiers for both
bands.
Supports various RF front–end architectures including:
Two antennas with one each dedicated to Bluetooth and
WLAN.
Two antennas with WLAN diversity and a shared Bluetooth
antenna.
Shared Bluetooth and WLAN receive signal path eliminates the
need for an external power splitter while maintaining excellent
sensitivity for both Bluetooth and WLAN.
Internal fractional nPLL allows support for a wide range of
reference clock frequencies
Supports IEEE 802.15.2 external coexistence interface to
optimize bandwidth utilization with other co–located wireless.
technologies such as LTE or GPS.
Supports standard SDIO v3.0 (up to SDR104 mode at
208 MHz, 4–bit and 1-bit) host interfaces.
Backward compatible with SDIO v2.0 host interfaces.
Alternative host interface supports HSIC v1.0
PCIe mode complies with PCI Express base specification
revision 3.0 for ×1 lane and power management running at
Gen1 speeds.
Integrated ARMCR4™ processor with tightly coupled memory
for complete WLAN subsystem functionality, minimizing the
need to wake up the applications processor for standard WLAN
functions. This allows for further minimization of power
consumption, while maintaining the ability to field upgrade with
future features. On–chip memory includes 768 KB SRAM and
640 KB ROM.
OneDriver™ software architecture for easy migration from
existing embedded WLAN and Bluetooth devices as well as
future devices.
Bluetooth and FM Key Features
Complies with Bluetooth Core Specification Version 4.1 with
provisions for supporting future specifications.
Bluetooth Class 1 or Class 2 transmitter operation.
Supports extended synchronous connections (eSCO), for
enhanced voice quality by allowing for retransmission of
dropped packets.
Adaptive frequency hopping (AFH) for reducing radio
frequency interference.
Interface support, host controller interface (HCI) using a USB
or high–speed UART interface and PCM for audio data.
USB 2.0 full–speed (12 Mbps) supported for Bluetooth.
The FM unit supports HCI for communication.
Low power consumption improves battery life of handheld
devices.
FM receiver: 65 MHz to 108 MHz FM bands; supports the
European radio data systems (RDS) and the North American
radio broadcast data system (RBDS) standards.
Supports multiple simultaneous Advanced Audio Distribution
Profiles (A2DP) for stereo sound.
Automatic frequency detection for standard crystal and TCXO
values.
Supports serial flash interfaces.
General Features
Supports battery range from 3.0V to 5.25V supplies with
internal switching regulator.
Programmable dynamic power management
484 bytes of user-accessible OTP for storing board parameters
GPIOs: 11 in WLBGA, 16 in WLCSP
Package options:
192-ball WLBGA (4.87 mm × 7.67 mm, 0.4 mm pitch
395-bump WLCSP (4.87 mm × 7.67 mm, 0.2 mm pitch)
Security:
WPA™ and WPA2™ (Personal) support for powerful encryp-
tion and authentication
AES and TKIP in hardware for faster data encryption and
IEEE 802.11i compatibility
Reference WLAN subsystem provides Cisco® Compatible
Extensions (CCX, CCX 2.0, CCX 3.0, CCX 4.0, CCX 5.0)
Reference WLAN subsystem provides Wi-Fi Protected Setup
(WPS)
Worldwide regulatory support: Global products supported with
worldwide homologated design.
Document Number: 002-14809 Rev. *L
Page 2 of 162


Features CYW4354 Single-Chip 5G Wi-Fi IEEE 802.11 ac 2×2 MAC/Baseband/ Radio with Integr ated Bluetooth 4.1 and FM Receiver The Cypress CYW4354 is a complete dual–b and (2.4 GHz and 5 GHz) 5G Wi–Fi 2 × 2 MIMO® MAC/PHY/Radio System–on–a –Chip. This Wi–Fi single–chip dev ice provides a high level of integratio n with dual–stream IEEE 802.11ac MAC/ baseband/radio, Bluetooth 4.1, and FM r adio receiver. In IEEE 802.11ac mode, t he WLAN operation supports rates of MCS 0–MCS9 (up to 256 QAM) in 20 MHz, 40 MHz, and 80 MHz channels for data rates up to 867 Mbps. In addition, all the r ates specified in IEEE 802.11a/b/g/n ar e supported. Included on–chip are 2.4 GHz and 5 GHz transmit power amplifier s and receive low noise amplifiers. For the WLAN section, several alternative host interface options are included: an SDIO v3.0 interface that can operate i n 4b or 1b modes, a high-speed inter-ch ip (HSIC) interface, and a PCIe v3.0 co mpliant interface running at Gen1 speeds. For the Bluetooth section, host interface op.
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