A28F400BR-B MEMORY Datasheet

A28F400BR-B Datasheet PDF, Equivalent


Part Number

A28F400BR-B

Description

4-MBIT SmartVoltage BOOT BLOCK FLASH MEMORY

Manufacture

Intel

Total Page 30 Pages
PDF Download
Download A28F400BR-B Datasheet PDF


A28F400BR-B
E
ADVANCE INFORMATION
A28F400BR-T/B
4-MBIT (256K X 16, 512K X 8)
SmartVoltage BOOT BLOCK
FLASH MEMORY FAMILY
Automotive
n Intel SmartVoltage Technology
5V or 12V Program/Erase
5V Read Operation
n Very High Performance Read
80 ns Max. Access Time,
40 ns Max. Output Enable Time
n Low Power Consumption
Maximum 60 mA Read Current at 5V
n x8/x16-Selectable Input/Output Bus
High Performance 16- or 32-bit
CPUs
n Optimized Array Blocking Architecture
One 16-KB Protected Boot Block
Two 8-KB Parameter Blocks
One 96-KB Main Block
Three 128-KB Main Blocks
Top or Bottom Boot Locations
n Hardware-Protection for Boot Block
n Software EEPROM Emulation with
Parameter Blocks
n Automotive Temperature Operation
–40°C to +125°C
n Extended Cycling Capability
30,000 Block Erase Cycles for
Parameter Blocks
1,000 Block Erase Cycles for Main
Blocks
n Automated Word/Byte Program and
Block Erase
Industry-Standard Command User
Interface
Status Registers
Erase Suspend Capability
n SRAM-Compatible Write Interface
n Automatic Power Savings Feature
1 mA Typical ICC Active Current in
Static Operation
n Reset/Deep Power-Down Input
0.2 µA ICCTypical
Provides Reset for Boot Operations
n Hardware Data Protection Feature
Write Lockout during Power
Transitions
n Industry-Standard Surface Mount
Packaging
44-Lead PSOP: JEDEC ROM
Compatible
n ETOX™ IV Flash Technology
December 1996
Order Number: 290538-005

A28F400BR-B
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COPYRIGHT © INTEL CORPORATION, 1996
CG-041493


Features E ADVANCE INFORMATION A28F400BR-T/B 4-M BIT (256K X 16, 512K X 8) SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY Automot ive n Intel SmartVoltage Technology 5V or 12V Program/Erase  5V Read O peration n Very High Performance Read 80 ns Max. Access Time,  40 ns Ma x. Output Enable Time n Low Power Consu mption  Maximum 60 mA Read Current a t 5V n x8/x16-Selectable Input/Output B us  High Performance 16- or 32-bit C PUs n Optimized Array Blocking Architec ture  One 16-KB Protected Boot Block  Two 8-KB Parameter Blocks  One 96-KB Main Block  Three 128-KB Main Blocks  Top or Bottom Boot Locations n Hardware-Protection for Boot Block n Software EEPROM Emulation with Paramet er Blocks n Automotive Temperature Oper ation  –40°C to +125°C n Extende d Cycling Capability  30,000 Block E rase Cycles for Parameter Blocks  1, 000 Block Erase Cycles for Main Blocks n Automated Word/Byte Program and Bloc k Erase  Industry-Standard Command User Interface  Status Registers  Erase Suspend Capabilit.
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