C8051F368

C8051F360/1/2/3/4/5/6/7/8/9 Mixed Signal ISP Flash MCU Family Analog Peripherals - 10-Bit ADC (‘F360/1/2/6/7/8/9 only) Up to 200 ksps Up to 21 external single-ended or differential inputs VREF from internal VREF, external pin or VDD Internal or external start of conversion source Built-in temperature sensor - 10-Bit Current Output DAC (‘F360/1/2/6/7/8/9 only) - Two Comparators Programmable hysteresis and response time Configurable as interrupt or reset source Low current (0.4 µA) - Brown-out detector and POR Circuitry On-Chip Debug - On-chip debug circuitry facilitates full speed, nonintrusive in-system debug (no emulator required) - Provides breakpoints, single stepping, inspect/modify memory and registers - Superior performance to emulation systems using ICE-chips, target pods, and sockets - Low cost, complete development kit Supply Voltage - Range: 2.7–3.6 V (50 MIPS) 3.0–3.6 V (100 MIPS) - Power saving suspend and shutdown modes High Speed 8051 µC Core - Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks - 100 MIPS or 50 MIPS throughput with on-chip PLL - Expanded interrupt handler - 2-cycle 16 x 16 MAC engine Memory - 1280 bytes internal data RAM (256 + 1024) - 32 kB (‘F360/1/2/3/4/5/6/7) or 16 kB (‘F368/9) Flash; In-system programmable in 1024-byte Sectors— 1024 bytes are reserved in the 32 kB devices Digital Peripherals - up to 39 Port I/O; All 5 V tolerant with high sink cur- rent - Hardware enhanced UART, SMBus...