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C8051F061 Dataheets PDF



Part Number C8051F061
Manufacturers Silicon Laboratories
Logo Silicon Laboratories
Description 8K ISP FLASH MCU
Datasheet C8051F061 DatasheetC8051F061 Datasheet (PDF)

C8051F060/1/2/3/4/5/6/7 8K ISP FLASH MCU Family Analog Peripherals - Two 16-Bit SAR ADCs • 16-bit resolution • ±0.75 LSB INL, guaranteed no missing codes • Programmable throughput up to 1 Msps • Operate as two single-ended or one differential con- verter • Direct memory access; data stored in RAM without software overhead • Data-dependent windowed interrupt generator - 10-bit SAR ADC (C8051F060/1/2/3) • Programmable throughput up to 200 ksps • 8 external inputs, single-ended or differential • B.

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C8051F060/1/2/3/4/5/6/7 8K ISP FLASH MCU Family Analog Peripherals - Two 16-Bit SAR ADCs • 16-bit resolution • ±0.75 LSB INL, guaranteed no missing codes • Programmable throughput up to 1 Msps • Operate as two single-ended or one differential con- verter • Direct memory access; data stored in RAM without software overhead • Data-dependent windowed interrupt generator - 10-bit SAR ADC (C8051F060/1/2/3) • Programmable throughput up to 200 ksps • 8 external inputs, single-ended or differential • Built-in temperature sensor - Two 12-bit DACs (C8051F060/1/2/3) • Can synchronize outputs to timers for jitter-free wave- form generation - Three Analog Comparators • Programmable hysteresis/response time - Voltage Reference - Precision VDD Monitor/Brown-Out Detector On-Chip JTAG Debug & Boundary Scan - On-chip debug circuitry facilitates full-speed, nonintrusive in-circuit/in-system debugging - Provides breakpoints, single-stepping, watchpoints, stack monitor; inspect/modify memory and registers - Superior performance to emulation systems using ICE-chips, target pods, and sockets - IEEE1149.1 compliant boundary scan - Complete development kit High Speed 8051 μC Core - Pipelined instruction architecture; executes 70% of instruction set in 1 or 2 system clocks - Up to 25 MIPS throughput with 25 MHz clock - Flexible Interrupt sources Memory - 4352 Bytes internal data RAM (4 k + 256) - 64 kB (C8051F060/1/2/3/4/5), 32 kB (C8051F066/7) Flash; In-system programmable in 512-byte sectors - External 64 kB data memory interface with multi- plexed and non-multiplexed modes (C8051F060/2/ 4/6) Digital Peripherals - 59 general purpose I/O pins (C8051F060/2/4/6) - 24 general purpose I/O pins (C8051F061/3/5/7) - Bosch Controller Area Network (CAN 2.0B C8051F060/1/2/3) - Hardware SMBus™ (I2C™ Compatible), SPI™, and two UART serial ports available concurrently - Programmable 16-bit counter/timer array with 6 capture/compare modules - 5 general purpose 16-bit counter/timers - Dedicated watchdog timer; bi-directional reset pin Clock Sources - Internal calibrated precision oscillator: 24.5 MHz - External oscillator: Crystal, RC, C, or clock Supply Voltage .......................... 2.7 to 3.6 V - Multiple power saving sleep and shutdown modes 100-Pin and 64-Pin TQFP Packages Available Temperature Range: -40 to +85 °C ANALOGPERIPHERALS 16-bit 1 Msps ADC 16-bit 1 Msps ADC DMA Interface VREF + ++ - -VOLTAGE COMPARATOR S 10-bit 200ksps TEMP SENSOR ADC C8051F060/1/2/3Only 12-Bit DAC 12-Bit DAC DIGITAL I/O CAN 2.0B C8051F060/1/2/3 Port 0 Port 1 CROSSBAR UART0 UART1 SMBus SPI Bus PCA Timer 0 Timer 1 Timer 2 Timer 3 Timer 4 External Memory Interface Port 2 Port 3 Port 4 Port 5 Port 6 Port 7 100 pin Only HIGH-SPEED CONTROLLER CORE 8051 CPU (25MIPS) 22 INTERRUPTS 64/32 kB ISP FLASH DEBUG CIRCUITRY 4352 B SRAM JTAG CLOCK SANITY CIRCUIT CONTROL AMUX Rev. 1.2 12/03 Copyright © 2003 by Silicon Laboratories C8051F060/1/2/3/4/5/6/7 C8051F060/1/2/3/4/5/6/7 2 Rev. 1.2 C8051F060/1/2/3/4/5/6/7 Table of Contents 1. System Overview.................................................................................................... 19 1.1. CIP-51™ Microcontroller Core.......................................................................... 25 1.1.1. Fully 8051 Compatible.............................................................................. 25 1.1.2. Improved Throughput ............................................................................... 25 1.1.3. Additional Features .................................................................................. 26 1.2. On-Chip Memory............................................................................................... 27 1.3. JTAG Debug and Boundary Scan..................................................................... 28 1.4. Programmable Digital I/O and Crossbar ........................................................... 29 1.5. Programmable Counter Array ........................................................................... 30 1.6. Controller Area Network.................................................................................... 31 1.7. Serial Ports ....................................................................................................... 32 1.8. 16-Bit Analog to Digital Converters................................................................... 33 1.9. 10-Bit Analog to Digital Converter..................................................................... 34 1.10.12-bit Digital to Analog Converters................................................................... 35 1.11.Analog Comparators......................................................................................... 36 2. Absolute Maximum Ratings .................................................................................. 37 3. Global DC Electrical Characteristics ...................................................................


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