Document
MICRONAS
PRELIMINARY DATA SHEET
MSP 34x5G Multistandard Sound Processor Family
Edition March 5, 2001 6251-480-3PD
MICRONAS
MSP 34x5G
PRELIMINARY DATA SHEET
Contents
Page
Section
5 1. 6 1.1. 6 1.2. 7 1.3.
8 2. 9 2.1. 9 2.2. 9 2.2.1. 9 2.2.2. 10 2.2.3. 10 2.2.4. 10 2.2.5. 12 2.3. 12 2.4. 12 2.5. 12 2.5.1. 12 2.5.2. 12 2.5.3. 13 2.6. 13 2.6.1. 13 2.6.2. 13 2.7. 14 2.8. 14 2.9. 14 2.10.
15 3. 15 3.1. 15 3.1.1. 16 3.1.2. 16 3.1.3. 17 3.1.4. 17 3.1.4.1. 17 3.1.4.2. 17 3.1.4.3. 17 3.1.4.4. 17 3.2. 17 3.3. 17 3.3.1. 20 3.3.2. 21 3.3.2.1. 21 3.3.2.2. 21 3.3.2.3. 23 3.3.2.4. 25 3.3.2.5. 26 3.3.2.6.
Title
Introduction Features of the MSP 34x5G Family and Differences to MSPD MSP 34x5G Version List MSP 34x5G Versions and their Application Fields
Functional Description Architecture of the MSP 34x5G Family Sound IF Processing Analog Sound IF Input Demodulator: Standards and Features Preprocessing of Demodulator Signals Automatic Sound Select Manual Mode Preprocessing for SCART and I2S Input Signals Source Selection and Output Channel Matrix Audio Baseband Processing Automatic Volume Correction (AVC) Loudspeaker Outputs Quasi-Peak Detector SCART Signal Routing SCART DSP In and SCART Out Select Stand-by Mode I2S Bus Interface ADR Bus Interface Digital Control I/O Pins and Status Change Indication Clock PLL Oscillator and Crystal Specifications
Control Interface I2C Bus Interface Internal Hardware Error Handling Description of CONTROL Register Protocol Description Proposals for General MSP 34x5G I2C Telegrams Symbols Write Telegrams Read Telegrams Examples Start-Up Sequence: Power-Up and I2C-Controlling MSP 34x5G Programming Interface User Registers Overview Description of User Registers STANDARD SELECT Register Refresh of STANDARD SELECT Register STANDARD RESULT Register Write Registers on I2C Subaddress 10hex Read Registers on I2C Subaddress 11hex Write Registers on I2C Subaddress 12hex
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Micronas
PRELIMINARY DATA SHEET
MSP 34x5G
Contents, continued
Page
36 37 37 37 37 37 38 38 38
Section
3.3.2.7. 3.4. 3.5. 3.5.1. 3.5.2. 3.5.3. 3.5.4. 3.5.5. 3.5.6.
Title
Read Registers on I2C Subaddress 13hex Programming Tips Examples of Minimum Initialization Codes B/G-FM (A2 or NICAM) BTSC-Stereo BTSC-SAP with SAP at Loudspeaker Channel FM-Stereo Radio Automatic Standard Detection Software Flow for Interrupt driven STATUS Check
40 4.
Specifications
40 4.1. Outline Dimensions
42 4.2. Pin Connections and Short Descriptions
45 4.3. Pin Description
47 4.4. Pin Configurations
51 4.5. Pin Circuits
53 4.6. Electrical Characteristics
53
4.6.1.
Absolute Maximum Ratings
54
4.6.2.
Recommended Operating Conditions
54 4.6.2.1. General Recommended Operating Conditions
54 4.6.2.2. Analog Input and Output Recommendations
55 4.6.2.3. Recommendations for Analog Sound IF Input Signal
56 4.6.2.4. Crystal Recommendations
58
4.6.3.
Characteristics
58 4.6.3.1. General Characteristics
59 4.6.3.2. Digital Inputs, Digital Outputs
60 4.6.3.3. Reset Input and Power-Up 61 4.6.3.4. I2C Bus Characteristics 62 4.6.3.5. I2S-Bus Characteristics
64 4.6.3.6. Analog Baseband Inputs and Outputs, AGNDC
65 4.6.3.7. Sound IF Input
65 4.6.3.8. Power Supply Rejection
66 4.6.3.9. Analog Performance
69 4.6.3.10. Sound Standard Dependent Characteristics
73 5.
Appendix A: Overview of TV Sound Standards
73 5.1. NICAM 728
74 5.2. A2 Systems
75 5.3. BTSC-Sound System
75 5.4. Japanese FM Stereo System (EIA-J)
76 5.5. FM Satellite Sound
76 5.6. FM-Stereo Radio
77 6.
Appendix B: Manual/Compatibility Mode
77 6.1. Demodulator Write and Read Registers for Manual/Compatibility Mode
78 6.2. DSP Write and Read Registers for Manual/Compatibility Mode
79 6.3. Manual/Compatibility Mode: Description of Demodulator Write Registers
79
6.3.1.
Automatic Switching between NICAM and Analog Sound
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PRELIMINARY DATA SHEET
Contents, continued
Page
Section Title
79 6.3.1.1. Function in Automatic Sound Select Mode
79 6.3.1.2. Function in Manual Mode
81
6.3.2.
A2 Threshold
81
6.3.3.
Carrier-Mute Threshold
82
6.3.4.
Register AD_CV
83
6.3.5.
Register MODE_REG
85
6.3.6.
FIR-Parameter, Registers FIR1 and FIR2
85
6.3.7.
DCO-Registers
87 6.4. Manual/Compatibility Mode: Description of Demodulator Read Registers
87
6.4.1.
NICAM Mode Control/Additional Data Bits Register
87
6.4.2.
Additional Data Bits Register
87
6.4.3.
CIB Bits Register
88
6.4.4.
NICAM Error Rate Register
88
6.4.5.
PLL_CAPS Readback Register
88
6.4.6.
AGC_GAIN Readback Register
88
6.4.7.
Automatic Search Function for FM-Carrier Detection in Satellite Mode
89 6.5. Manual/Compatibility Mode: Description of DSP Write Registers
89
6.5.1.
Additional Channel Matrix Modes
89
6.5.2.
Volume Modes of SCART1 Output
89
6.5.3.
FM Fixed Deemphasis
89
6.5.4.
FM Adaptive Deemphasis
89
6.5.5.
NICAM Deemphasis
90
6.5.6.
Identification Mode for A2 Stereo Systems
90
6.5.7.
FM DC Notch
90 6.6. Manual/Compatibility Mode:.