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C8051F704 Dataheets PDF



Part Number C8051F704
Manufacturers Silicon Laboratories
Logo Silicon Laboratories
Description Mixed Signal ISP Flash MCU
Datasheet C8051F704 DatasheetC8051F704 Datasheet (PDF)

CROSSBARNot Recommended for New Designs Ext. Memory I/F Capacitance to Digital Converter - Supports buttons, sliders, wheels, capacitive prox- imity, and touch screen sensing - Up to 38 input channels - Fast 40 µs per channel conversion time - 12, 13, 14, or 16-bit output - Auto-scan and wake-on-touch - Auto-accumulate 4, 8, 16, 32, or 64 samples 10-Bit Analog to Digital Converter - Up to 500 ksps - Up to 16 external single-ended inputs - VREF from on-chip VREF, external pin or VDD - Internal o.

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CROSSBARNot Recommended for New Designs Ext. Memory I/F Capacitance to Digital Converter - Supports buttons, sliders, wheels, capacitive prox- imity, and touch screen sensing - Up to 38 input channels - Fast 40 µs per channel conversion time - 12, 13, 14, or 16-bit output - Auto-scan and wake-on-touch - Auto-accumulate 4, 8, 16, 32, or 64 samples 10-Bit Analog to Digital Converter - Up to 500 ksps - Up to 16 external single-ended inputs - VREF from on-chip VREF, external pin or VDD - Internal or external start of conversion source - Built-in temperature sensor Analog Comparator - Programmable hysteresis and response time - Configurable as interrupt or reset source On-Chip Debug - On-chip debug circuitry facilitates full speed, non- intrusive in-system debug (no emulator required) - Provides breakpoints, single stepping, inspect/modify memory and registers - Superior performance to emulation systems using ICE-chips, target pods, and sockets - Low cost, complete development kit Supply Voltage 1.8 to 3.6 V - Built-in voltage supply monitor C8051F70x/71x Mixed Signal ISP Flash MCU Family High-Speed 8051 µC Core - Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks - Up to 25 MIPS throughput with 25 MHz clock - Expanded interrupt handler Memory - 512 bytes internal data RAM (256 + 256) - Up to 16 kB Flash; In-system programmable in 512- byte Sectors - Up to 32-byte data EEPROM Digital Peripherals - Up to 54 Port I/O with high sink current - Hardware enhanced UART, SMBus™ (I2C compati- ble), and enhanced SPI™ serial ports - Four general purpose 16-bit counter/timers - 16-Bit programmable counter array (PCA) with 3 capture/compare modules and enhanced PWM functionality - Real time clock mode using timer and crystal Clock Sources - 24.5 MHz ±2% Oscillator Supports crystal-less UART operation - External oscillator: Crystal, RC, C, or clock (1 or 2 pin modes) - Can switch between clock sources on-the-fly; useful in power saving modes 64-Pin TQFP, 48-Pin TQFP, 48-Pin QFN, 32-Pin QFN, 24-Pin QFN Temperature Range: –40 to +85 °C ANALOG PERIPHERALS A M U 10-bit TEMP 500 ksps SENSOR X ADC + Capacitive Sense – VOLTAGE COMPARATOR DIGITAL I/O UART Port 0 SMBus Port 1 SPI PCA Timer 0 Timer 1 Timer 2 Timer 3 Port 2 Port 3 Port 4 Port 5 Port 6.0 – 6.5 24.5 MHz PRECISION INTERNAL OSCILLATOR HIGH-SPEED CONTROLLER CORE 16 kB ISP FLASH FLEXIBLE INTERRUPTS 8051 CPU (25 MIPS) DEBUG CIRCUITRY 512 B RAM 32 B EEPROM POR WDT Rev. 1.0 7/10 Copyright © 2010 by Silicon Laboratories C8051F70x/71x C8051F70x/71x 2 Rev. 1.0 Not Recommended for New Designs Not Recommended for New Designs C8051F70x/71x Table of Contents 1. System Overview ..................................................................................................... 17 2. Ordering Information ............................................................................................... 26 3. Pin Definitions...........................................


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