11LC010 EEPROM Datasheet

11LC010 Datasheet PDF, Equivalent


Part Number

11LC010

Description

EEPROM

Manufacture

Microchip

Total Page 30 Pages
PDF Download
Download 11LC010 Datasheet PDF


11LC010
11AA010/11LC010
11AA020/11LC020
11AA040/11LC040
11AA080/11LC080
11AA160/11LC160
11AA161/11LC161
1K-16K UNI/O® Serial EEPROM Family Data Sheet
Features:
• Single I/O, UNI/O® Serial Interface Bus
• Low-Power CMOS Technology:
- 1 mA active current, typical
- 1 µA standby current (max.) (I-temp)
• 128 x 8 through 2,048 x 8 Bit Organizations
• Schmitt Trigger Inputs for Noise Suppression
• Output Slope Control to Eliminate Ground Bounce
• 100 kbps Max. Bit Rate – Equivalent to 100 kHz
Clock Frequency
• Self-Timed Write Cycle (including Auto-Erase)
• Page-Write Buffer for up to 16 Bytes
• STATUS Register for Added Control:
- Write enable latch bit
- Write-In-Progress bit
• Block Write Protection:
- Protect none, 1/4, 1/2 or all of array
• Built-in Write Protection:
- Power-on/off data protection circuitry
- Write enable latch
• High Reliability:
- Endurance: 1,000,000 erase/write cycles
- Data retention: > 200 years
- ESD protection: > 4,000V
• 3-lead SOT-23 and TO-92 Packages
• 4-lead Chip Scale Package
• 8-lead PDIP, SOIC, MSOP, TDFN Packages
• Pb-Free and RoHS Compliant
• Available Temperature Ranges:
- Industrial (I):
- Automotive (E):
-40°C to +85°C
-40°C to +125°C
Pin Function Table
Name
Function
SCIO
VSS
VCC
Serial Clock, Data Input/Output
Ground
Supply Voltage
Description:
The Microchip Technology Inc. 11AAXXX/11LCXXX
(11XX*) devices are a family of 1 Kbit through 16 Kbit
Serial Electrically Erasable PROMs. The devices are
organized in blocks of x8-bit memory and support the
patented** single I/O UNI/O® serial bus. By using
Manchester encoding techniques, the clock and data
are combined into a single, serial bit stream (SCIO),
where the clock signal is extracted by the receiver to
correctly decode the timing and value of each bit.
Low-voltage design permits operation down to 1.8V (for
11AAXXX devices), with standby and active currents of
only 1 uA and 1 mA, respectively.
The 11XX family is available in standard packages
including 8-lead PDIP and SOIC, and advanced pack-
aging including 3-lead SOT-23, 3-lead TO-92, 4-lead
Chip Scale, 8-lead TDFN, and 8-lead MSOP.
Package Types (not to scale)
MSOP
(MS)
PDIP/SOIC
(P, SN)
NC
NC
NC
VSS
1
2
3
4
8 VCC NC 1
7 NC NC 2
6
5
NC
SCIO
NC 3
Vss 4
8 VCC
7 NC
6 NC
5 SCIO
NC 1
NC 2
NC 3
VSS 4
TDFN
(MN)
SOT23
(TT)
8 VCC
7 NC VSS 3
6 NC
5 SCIO
2 VCC
1 SCIO
TO-92
(TO)
CS (Chip Scale)(1)
VCC 1
2 VSS
Vss
Vcc
SCIO
SCIO 3
4 NC
(Top down view,
balls not visible)
Note 1: Available in I-temp, “AA” only.
* 11XX is used in this document as a generic part number for the 11 series devices.
** Microchip’s UNI/O® Bus products are covered by some or all of the following patents issued in the U.S.A.: 7,376,020 & 7,788,430.
2011 Microchip Technology Inc.
DS22067J-page 1

11LC010
11XX
DEVICE SELECTION TABLE
Part Number
Density
(bits)
Organization
VCC Range
Page Size
(Bytes)
11LC010
1K
128 x 8
2.5-5.5V
11AA010
1K
128 x 8
1.8-5.5V
11LC020
2K
256 x 8
2.5-5.5V
11AA020
2K
256 x 8
1.8-5.5V
11LC040
4K
512 x 8
2.5-5.5V
11AA040
4K
512 x 8
1.8-5.5V
11LC080
8K
1,024 x 8
2.5-5.5V
11AA080
8K
1,024 x 8
1.8-5.5V
11LC160 16K 2,048 x 8 2.5-5.5V
11AA160 16K 2,048 x 8 1.8-5.5V
11LC161 16K 2,048 x 8 2.5-5.5V
11AA161 16K 2,048 x 8 1.8-5.5V
16
16
16
16
16
16
16
16
16
16
16
16
Temp.
Ranges
I,E
I
I,E
I
I,E
I
I,E
I
I,E
I
I, E
I
Device
Address
0xA0
0xA0
0xA0
0xA0
0xA0
0xA0
0xA0
0xA0
0xA0
0xA0
0xA1
0xA1
Packages
P, SN, MS, MN, TO, TT
P, SN, MS, MN, TO, TT, CS
P, SN, MS, MN, TO, TT
P, SN, MS, MN, TO, TT, CS
P, SN, MS, MN, TO, TT
P, SN, MS, MN, TO, TT, CS
P, SN, MS, MN, TO, TT
P, SN, MS, MN, TO, TT, CS
P, SN, MS, MN, TO, TT
P, SN, MS, MN, TO, TT,CS
P, SN, MS, MN, TO, TT
P, SN, MS, MN, TO, TT, CS
DS22067J-page 2
2011 Microchip Technology Inc.


Features 11AA010/11LC010 11AA020/11LC020 11AA040/ 11LC040 11AA080/11LC080 11AA160/11LC16 0 11AA161/11LC161 1K-16K UNI/O® Seria l EEPROM Family Data Sheet Features: • Single I/O, UNI/O® Serial Interfac e Bus • Low-Power CMOS Technology: - 1 mA active current, typical - 1 µA standby current (max.) (I-temp) • 1 28 x 8 through 2,048 x 8 Bit Organizati ons • Schmitt Trigger Inputs for Noi se Suppression • Output Slope Contro l to Eliminate Ground Bounce • 100 k bps Max. Bit Rate – Equivalent to 100 kHz Clock Frequency • Self-Timed Wr ite Cycle (including Auto-Erase) • P age-Write Buffer for up to 16 Bytes STATUS Register for Added Control: - Write enable latch bit - Write-In-Pro gress bit • Block Write Protection: - Protect none, 1/4, 1/2 or all of arr ay • Built-in Write Protection: - P ower-on/off data protection circuitry - Write enable latch • High Reliabil ity: - Endurance: 1,000,000 erase/writ e cycles - Data retention: > 200 years - ESD protection: > 4,000V • 3-lead SOT-23 and TO-.
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