Document
MachXO2™ Family Data Sheet
DS1035 Version 3.3, March 2017
MachXO2 Family Data Sheet Introduction
May 2016
Data Sheet DS1035
Features
Flexible Logic Architecture
• Six devices with 256 to 6864 LUT4s and 18 to 334 I/Os
Ultra Low Power Devices
• Advanced 65 nm low power process • As low as 22 µW standby power • Programmable low swing differential I/Os • Stand-by mode and other power saving options
Embedded and Distributed Memory
• Up to 240 kbits sysMEM™ Embedded Block RAM
• Up to 54 kbits Distributed RAM • Dedicated FIFO control logic
On-Chip User Flash Memory
• Up to 256 kbits of User Flash Memory • 100,000 write cycles • Accessible through WISHBONE, SPI, I2C and
JTAG interfaces • Can be used as soft processor PROM or as
Flash memory
Pre-Engineered Source Synchronous I/O
• DDR registers in I/O cells • Dedicated gearing logic • 7:1 Gearing for Display I/Os • Generic DDR, DDRX2, DDRX4 • Dedicated DDR/DDR2/LPDDR memory with
DQS support
High Performance, Flexible I/O Buffer
• Programmable sysIO™ buffer supports wide range of interfaces: – LVCMOS 3.3/2.5/1.8/1.5/1.2 – LVTTL – PCI – LVDS, Bus-LVDS, MLVDS, RSDS, LVPECL – SSTL 25/18 – HSTL 18 – Schmitt trigger inputs, up to 0.5 V hysteresis
• I/Os support hot socketing • On-chip differential termination • Programmable pull-up or pull-down mode
Flexible On-Chip Clocking
• Eight primary clocks • Up to two edge clocks for high-speed I/O
interfaces (top and bottom sides only) • Up to two analog PLLs per device with
fractional-n frequency synthesis – Wide input frequency range (7 MHz to 400 MHz)
Non-volatile, Infinitely Reconfigurable
• Instant-on – powers up in microseconds
• Single-chip, secure solution • Programmable through JTAG, SPI or I2C
• Supports background programming of non-vola-
tile memory
• Optional dual boot with external SPI memory
TransFR™ Reconfiguration
• In-field logic update while system operates
Enhanced System Level Support
• On-chip hardened functions: SPI, I2C, timer/
counter
• On-chip oscillator with 5.5% accuracy
• Unique TraceID for system tracking
• One Time Programmable (OTP) mode
• Single power supply with extended operating
range
• IEEE Standard 1149.1 boundary scan
• IEEE 1532 compliant in-system programming
Broad Range of Package Options
• TQFP, WLCSP, ucBGA, csBGA, caBGA, ftBGA,
fpBGA, QFN package options
• Small footprint package options
– As small as 2.5 mm x 2.5 mm
• Density migration supported
• Advanced halogen-free packaging
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1-1 DS1035 Introduction_02.2
Introduction MachXO2 Family Data Sheet
Table 1-1. MachXO2™ Family Selection Guide
XO2-256 XO2-640
LUTs
256 640
Distributed RAM (kbits)
25
EBR SRAM (kbits)
0 18
Number of EBR SRAM Blocks (9 kbits/block)
0
2
UFM (kbits)
0 24
Device Options:
HC2
Yes Yes
HE3
ZE4 Yes Yes
Number of PLLs
00
Hardened Functions:
I2C SPI
22 11
Timer/Counter
1
1
Packages
25-ball WLCSP5 (2.5 mm x 2.5 mm, 0.4 mm)
32 QFN6 (5 mm x 5 mm, 0.5 mm)
21
48 QFN8, 9 (7 mm x 7 mm, 0.5 mm)
40 40
49-ball WLCSP5 (3.2 mm x 3.2 mm, 0.4 mm)
64-ball ucBGA (4 mm x 4 mm, 0.4 mm)
44
84 QFN7 (7 mm x 7 mm, 0.5 mm)
100-pin TQFP (14 mm x 14 mm)
55 78
132-ball csBGA (8 mm x 8 mm, 0.5 mm)
55 79
144-pin TQFP (20 mm x 20 mm)
184-ball csBGA7 (8 mm x 8 mm, 0.5 mm)
256-ball caBGA (14 mm x 14 mm, 0.8 mm)
256-ball ftBGA (17 mm x 17 mm, 1.0 mm)
332-ball caBGA (17 mm x 17 mm, 0.8 mm)
484-ball ftBGA (23 mm x 23 mm, 1.0 mm)
1. Ultra high I/O device. 2. High performance with regulator – VCC = 2.5 V, 3.3 V 3. High performance without regulator – VCC = 1.2 V 4. Low power without regulator – VCC = 1.2 V 5. WLCSP package only available for ZE devices. 6. 32 QFN package only available for HC and ZE devices. 7. 184 csBGA package only available for HE devices. 8. 48-pin QFN information is ‘Advanced’. 9. 48 QFN package only available for HC devices.
XO2-640U1 XO2-1200 XO2-1200U1 XO2-2000 XO2-2000U1 XO2-4000 XO2-7000
640
1280
1280
2112
2112
4320
6864
5 10 10 16 16 34 54
64 64 74 74 92 92 240
7 7 8 8 10 10 26
64 64 80 80 96 96 256 Yes Yes Yes Yes Yes Yes Yes
Yes Yes Yes Yes Yes Yes Yes Yes 1111222 2222222 1111111
1111111
IO
18
21
38
68
79 79
104 104 104
107 107 111 114 114
150
206 206 206
206 206
206 206
274 278
278 278 334
1-2
Introduction MachXO2 Family Data Sheet
Introduction
The MachXO2 family of ultra low power, instant-on, non-volatile PLDs has six devices with densities ranging from 256 to 6864 Look-Up Tables (LUTs). In addition to LUT-ba.