System Gates
v3.0
ProASIC™ 500K Family
Features and Benefits
High Capacity
• 100,000 to 475,000 System Gates • 14k to 63k Bits of T...
Description
v3.0
ProASIC™ 500K Family
Features and Benefits
High Capacity
100,000 to 475,000 System Gates 14k to 63k Bits of Two-Port SRAM 106 to 440 User I/Os
Performance
33 MHz PCI 32-bit PCI Internal System Performance up to 250 MHz External System Performance up to 100 MHz
Low Power
Low Impedance Flash Switches Segmented Hierarchical Routing Structure Small, Efficient Logic Cells
High Performance Routing Hierarchy
Ultra Fast Local Network Efficient Long Line Network High Speed Very Long Line Network High Performance Global Network
Nonvolatile and Reprogrammable Flash Technology
Live at Power Up No Configuration Device Required Retains Programmed Design During Power-Down/
Power-Up Cycles
I/O
Mixed 2.5V/3.3V Support with Individually-Selectable Voltage and Slew Rate
3.3V, PCI Compliance (PCI Revision 2.2)
Secure Programming
The Industry’s Most Effective Security Key Prevents Read Back of Programming Bit Stream
Standard FPGA and ASIC Design Flow
Flexibility with Choice of Industry-Standard Front-End Tools
Efficient Design Through Front-End Timing and Gate Optimization
ISP Support
In-System Programming (ISP) with Silicon Sculptor and Flash Pro
SRAMs and FIFOs
Up to 150 MHz Synchronous and Asynchronous Operation Netlist Generator Ensures Optimal Usage of Embedded
Memory Blocks
Boundary Scan Test
IEEE Std. 1149.1 (JTAG) Compliant
ProASIC Product Profile
Device
Maximum System Gates Typical Gates Maximum Flip-Flops Embedded RAM Bits Embedded...
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