TPS544B20 Converters Datasheet

TPS544B20 Datasheet PDF, Equivalent


Part Number

TPS544B20

Description

Synchronous Buck Converters

Manufacture

etcTI

Total Page 30 Pages
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TPS544B20
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TPS544B20, TPS544C20
SLUSB69B – MAY 2014 – REVISED JULY 2016
TPS544x20 4.5-V to 18-V, 20-A, and 30-A SWIFT™
Synchronous Buck Converters with PMBus™
1 Features
1 PMBus-Enabled Converters: 20 A, 30 A
• 4.5-V to 18-V input, 0.6-V to 5.5-V Output
• 5 mm × 7 mm LQFN Package with 0.5-mm Pitch
• Single Thermal Pad
• Integrated 4.5-mΩ and 2.0-mΩ Stacked
NexFET™ Power Stage
• 600-mV, 0.5% Reference
• Lossless, Low-Side MOSFET Current Sensing
• Selectable D-CAP™ and D-CAP2™ Mode Control
• Differential Remote Sensing
• Monotonic Start-Up into Pre-Biased Output
• Output Voltage Margin and Trim
• Output Voltage and Output Current Reporting
• External Temperature Monitoring with 2N3904
• Programmable via PMBus
– Overcurrent Protection
– UVLO, Soft-Start
– PGOOD, OV, UV, OT Levels
– Fault Responses
– Turn-On and Turn-Off Delays
• Thermal Shutdown
• Pin Compatible 20-A, 30-A Converters
2 Applications
• Test and Instrumentation
• Ethernet Switches, Optical Switches, Routers,
Base Stations
• Servers
• Enterprise Storage SSD
• High-Density Power Solutions
3 Description
The TPS544B20 and TPS544C20 devices are
PMBus compatible, non-isolated DC-DC Integrated
FET converters, capable of high-frequency operation
and delivering 20-A , or 30-A current output from a
5 mm × 7 mm package, enabling high-power density
and fast transient performance with minimal PCB
area. The PMBus interface provides for converter
configuration as well as monitoring of key parameters
including output voltage, current and an optional
external temperature. High-frequency, low-loss
switching, provided by an integrated NexFET power
stage and optimized drivers, allows for very high-
density power solutions and reduced inductor and
filter capacitor sizes. Response to fault conditions can
be set to either restart or latch off depending on
system requirements.
Table 1. Device Information(1)
PART NAME
TPS544B20
TPS544C20
PACKAGE
LQFN (40)
BODY SIZE (NOM)
5.00 mm × 7.00 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Efficiency vs Output Current
100
95
90
85
80
75
70
65
60
0
5
VIN = 12 V
fSW = 500 kHz
Output Voltage
0.6 V
1.0 V
1.8 V
3.3 V
0.8 V
1.2 V
2.5 V
10 15 20
Load Current (A)
L = 410 nH
RDCR = 0.3 mŸ
25 30
C003
Snubber = Open
RBOOT = 0 Ÿ
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

TPS544B20
TPS544B20, TPS544C20
SLUSB69B – MAY 2014 – REVISED JULY 2016
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Device Comparison Table..................................... 4
6 Pin Configuration and Functions ......................... 4
7 Specifications......................................................... 6
7.1 Absolute Maximum Ratings ...................................... 6
7.2 ESD Ratings.............................................................. 6
7.3 Recommended Operating Conditions....................... 6
7.4 Thermal Information .................................................. 7
7.5 Electrical Characteristics........................................... 8
7.6 Switching Characteristics ........................................ 11
7.7 Typical Characteristics ............................................ 12
8 Detailed Description ............................................ 16
8.1 Overview ................................................................. 16
8.2 Functional Block Diagram ....................................... 16
8.3 Feature Description................................................. 17
8.4 Device Functional Modes........................................ 27
8.5 Programming........................................................... 28
8.6 Register Maps ......................................................... 30
9 Applications and Implementation ...................... 52
9.1 Application Information............................................ 52
9.2 Typical Application .................................................. 52
10 Power Supply Recommendations ..................... 61
11 Layout................................................................... 62
11.1 Layout Guidelines ................................................. 62
11.2 Layout Example .................................................... 63
12 Device and Documentation Support ................. 65
12.1 Device Support...................................................... 65
12.2 Related Links ........................................................ 66
12.3 Trademarks ........................................................... 66
12.4 Receiving Notification of Documentation Updates 67
12.5 Community Resources.......................................... 67
12.6 Electrostatic Discharge Caution ............................ 67
12.7 Glossary ................................................................ 67
13 Mechanical, Packaging, and Orderable
Information ........................................................... 67
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (February 2016) to Revision B
Page
• Changed From: PGND to GND in the Pin Functions table Description for pins BP6 and BPEXT. ....................................... 4
• Changed Pin Functions table Description for VDD pin To: "Bypass with a 0.1-µF to 1.0-µF capacitor to GND
(thermal pad or GND pins) or through a dedicated connection to AGNDSNS." ................................................................... 5
• Changed From: "PGND" To: "GND" in Linear Regulators BP3 and BP6 and External Bypass (BPEXT) Section text. ..... 20
• Changed instances From: "PGND" To: "GND" in the Device Functional Modes ................................................................. 27
• Changed From: " a value of 4.7 μF" To: " a value of 0.1 μF to 1.0 μF" in the Input Capacitor Selection ............................ 55
• Changed text string From: "...one 4.7-μF, 25-V ceramic capacitor..." To: "...one 1.0-μF, 25-V ceramic capacitor..." in
the Input Capacitor Selection description. ............................................................................................................................ 56
• Changed From: "PGND" To: "GND" in the BP6, BP3 and BPEXT section ......................................................................... 56
• Added text to Layout Guidelines section for emphasis on grounding schemes. ................................................................. 62
• Changed PCB Layout Recommendation figure. ................................................................................................................. 63
• Added Receiving Notification of Documentation Updates section. ...................................................................................... 67
Changes from Original (May 2014) to Revision A
Page
• Deleted package suffix and reel quantities from Device Comparison Table ......................................................................... 4
• Changed "Handling" Ratings table to "ESD" Ratings and moved Tstg spec to the Absolute Maximum Ratings table........... 6
• Added sentence in Switching Frequency description........................................................................................................... 20
• Changed "Hiccup" to "Shutdown and latch-off" as the Default Behavior for CMD Command; and, changed Default
Register Value from 3Fh to 07h in Table 5, CMD Code 47h .............................................................................................. 29
• Changed "address" to "frequency" in the PMBus Command Description for CMD Code 80h in Table 5. .......................... 29
• Changed Default Value for Bit Position 5, 4, and 3 from 1 1 1 to 0 0 0 respectively in the
IOUT_OC_FAULT_RESPONSE (47h) table. ...................................................................................................................... 37
• Changed "IVADDR" to "IVFREQ" for Function at Bit Position 4 of the STATUS_MFR_SPECIFIC (80h); and also in
the accompanying description. ............................................................................................................................................ 44
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Copyright © 2014–2016, Texas Instruments Incorporated


Features Product Folder Order Now Technical Doc uments Tools & Software Support & Com munity TPS544B20, TPS544C20 SLUSB69B MAY 2014 – REVISED JULY 2016 TPS54 4x20 4.5-V to 18-V, 20-A, and 30-A SWIF T™ Synchronous Buck Converters with P MBus™ 1 Features •1 PMBus-Enabled Converters: 20 A, 30 A • 4.5-V to 18- V input, 0.6-V to 5.5-V Output • 5 mm × 7 mm LQFN Package with 0.5-mm Pitch • Single Thermal Pad • Integrated 4.5-mΩ and 2.0-mΩ Stacked NexFET™ P ower Stage • 600-mV, 0.5% Reference Lossless, Low-Side MOSFET Current Se nsing • Selectable D-CAP™ and D-CAP 2™ Mode Control • Differential Remo te Sensing • Monotonic Start-Up into Pre-Biased Output • Output Voltage Ma rgin and Trim • Output Voltage and Ou tput Current Reporting • External Tem perature Monitoring with 2N3904 • Pro grammable via PMBus – Overcurrent Pro tection – UVLO, Soft-Start – PGOOD, OV, UV, OT Levels – Fault Responses – Turn-On and Turn-Off Delays • Thermal Shutdown • Pin Compatible 20-A, 30-A Converters 2 Applications • Test and In.
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