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NTE7476 Flip-Flop Datasheet |
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Part Number | NTE7476 |
Description | Dual J-K Flip-Flop |
Manufacture | NTE |
Total Page | 3 Pages |
PDF Download |
![]() NTE7476
Integrated Circuit
TTL − Dual J−K Flip−Flop with Preset and Clear
Description:
The NTE7476 is a dual J−K flip−flop in a 16−Lead plastic DIP type package that contains two independent
J−K positive−edge−triggered flip−flops with individual J−K clock, preset, and clear inputs. J−K input is
loaded into the master while the clock is high and transferred to the slave on the high−to−low transition.
J and K inputs must be stable while the clock is high.
Absolute Maximum Ratings: (Note 1)
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V
Operating Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to +70C
Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65C to +150C
Note 1. Voltage values are with respect to network ground terminal.
Recommended Operating Conditions:
Parameter
Supply Voltage
High−Level Input Voltage
Low−Level Input Voltage
High−Level Output Current
Low−Level Output Current
Pulse Duration
CLK High
CLK Low
PRE or CLR Low
Setup Time Before CLK
Input Hold Time Data After CLK
Operating Temperature Range
Symbol
VCC
VIH
VIL
IOH
IOL
tw
tsu
th
TA
Min Typ Max Unit
4.75 5.0 5.25 V
2− −V
− − 0.8 V
− − −0.4 mA
− − 16 mA
20 −
− ns
47 −
− ns
25 −
− ns
0 − − ns
0 − − ns
0 − +70 C
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![]() Electrical Characteristics: (Note 2, Note 3)
Parameter
Symbol
Test Conditions
Input Clamp Voltage
High Level Output Voltage
Low Level Output Voltage
Input Current
High Level Input Current
J or K
VIK VCC = MIN, II = −12mA
VOH VCC = MIN, VIH = 2V, VIL = 0.8V, IOH = -0.4mA
VOL VCC = MIN, VIH = 2V, VIL = 0.8V, IOL = 16mA
II VCC = MAX, VI = 5.5V
IIH VCC = MAX, VI = 2.4V
All Other
Low Level Input Current
J or K
IIL VCC = MAX, VI = 0.4V
All Other (Note 4)
Short−Circuit Output Current IOS VCC = MAX, Note 5
Supply Current
ICC VCC = MAX, Note 6
Min Typ Max Unit
− − −1.5 V
2.4 3.4
V
− 0.2 0.4 V
− − 1 mA
− − 40 A
− − 80 A
− − −1.6 mA
− − −3.2 mA
−18 − −57 mA
− 10 20 mA
Note 2. .For conditions shown as MIN or MAX, use the appropriate value specified under “Recommended
Operation Conditions”.
Note 3. All typical values are at VCC = 5V, TA = +25C.
Note 4. Clear is tested with preset high and preset is tested with clear high.
Note 5. Not more than one output should be shorted at a time.
Note 6. Wmeitahsaulrleomutepnutt,sthoepecnlo, cICkCinipsumt eisagsuroreudndweidth. the Q and Q outputs high in turn. At the time of
Switching Characteristics: (VCC = 5V, TA = +25C unless otherwise specified)
Parameter
Symbol
Test Conditions
Min Typ Max Unit
Maximum Clock Frequency
fmax RL = 400, CL = 15pF 15 20
− MHz
Propagation Delay Time
(From PRE or CLR input to Any Q Output)
tPLH
tPHL
− 16 25 ns
− 25 40 ns
Propagation Delay Time
(From CLK input to Any Q Output)
tPLH
tPHL
− 16 25 ns
− 25 40 ns
PRE
L
H
L
H
H
H
H
Function Tables:
Inputs
CLR CLK J K
HXXX
LXXX
LXXX
H LL
H HL
H LH
H HH
Outputs
QQ
HL
LH
H{ H{
Q0 Q0
HL
LH
Toggle
{ This configuration is nonstable; that is, it will not persist
when wither preset or clear returns to its inactive (high) level.
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Features | NTE7476 Integrated Circuit TTL − Dual J−K Flip−Flop with Preset and Clear Description: The NTE7476 is a dual J K flip−flop in a 16−Lead plastic DIP type package that contains two inde pendent J−K positive−edge−trigger ed flip−flops with individual J−K c lock, preset, and clear inputs. J−K i nput is loaded into the master while th e clock is high and transferred to the slave on the high−to−low transition . J and K inputs must be stable while t he clock is high. Absolute Maximum Rat ings: (Note 1) Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V Operating Temperature Rang e, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to +70C Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . |
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