SAM9X60 MPU Datasheet

SAM9X60 Datasheet PDF, Equivalent


Part Number

SAM9X60

Description

Ultra-Low Power Arm MPU

Manufacture

Microchip

Total Page 30 Pages
Datasheet
Download SAM9X60 Datasheet


SAM9X60
SAM9X60
Ultra-Low Power Arm® ARM926EJ-SProcessor-Based
MPU, 600 MHz, Camera, LCD, 2D Graphics, Dual 10/100
Ethernet, CAN, USB, QSPI, FLEXCOMs, AES, SHA
Introduction
The SAM9X60 is a high-performance, ultra-low power ARM926EJ-S CPU-based embedded microprocessor (MPU)
running up to 600 MHz, with support for multiple memories such as SDRAM, LP-SDRAM, LPDDR, DDR2, and QSPI
and e.MMC Flash. The device integrates powerful peripherals for connectivity and user interface applications, and
offers security functions (tamper detection, secure boot program, secure key storage, etc.), TRNG, as well as high-
performance crypto accelerators for AES and SHA.
Features
• CPU running up to 600 MHz
– ARM926EJ-S Arm Thumb® processor
– 32-Kbyte data cache, 32-Kbyte instruction cache, Memory Management Unit (MMU)
• Memories
– One 160-Kbyte internal ROM
• 64-Kbyte internal ROM embedding a secure bootloader program supporting boot on Nand Flash,
SDCard, SPI or QSPI Flash. Bootloader features selectable by OTP bits
• 96-Kbyte ROM for NAND Flash BCH ECC table
– One 64-Kbyte internal SRAM (SRAM0), single-cycle access at system speed
– High-bandwidth Multi-port DDR2/LPDDR Controller
– 32/16-bit External Bus Interface (EBI) supporting 8/4-bank DDR2/LPDDR, 4/2-bank SDR/LPSDR, static
memories, with scrambling
– NAND Flash Controller, with up to 24-bit Programmable Multi-bit Error Correcting Code
– One 11-Kbyte OTP memory for secure key storage with emulation mode (OTP bits are emulated by a 4-
Kbyte SRAM (SRAM1))
• System Running up to 200 MHz
– Power-on reset cells, Reset Controller, Shutdown Controller, Periodic Interval Timer, Watchdog Timer
running on internal low-power 32-kHz RC and Real Time Clock running on external crystal
– Two internal trimmed RC oscillators: 32 kHz (low-power) and 12 MHz
– Two selectable crystal oscillators: 32.768 kHz (low-power) and 12 to 48 MHz
– One PLL for the system and one PLL optimized for USB high-speed operation (480 MHz)
– One dual-port 16-channel DMA Controller
– Advanced Interrupt Controller and Debug Unit
– JTAG port with disable bit in OTP memory
– Two programmable external clock signals
• Low-power Modes
– Backup mode with RTC, eight 32-bit general purpose backup registers, and Shutdown Controller to control
the external power supply
– Clock Generator and Power Management Controller
© 2019 Microchip Technology Inc.
Complete Datasheet
DS60001579A-page 1

SAM9X60
SAM9X60
– Software-programmable ultra-low power modes: Very Slow Clock operating mode (ULP0), and No-clock
operating Mode (ULP1) with fast wake-up capabilities
– Software programmable power optimization capabilities
• Peripherals
– LCD Controller with overlay, alpha-blending, rotation, scaling and color conversion. Up to 1024 x 768
resolution
– 2D Graphics Controller supporting fill BLT, copy BLT, transparent BLT, blend/alpha BLT, ROP4 BLT (Raster
Operations) and command ring buffer
– ITU-R BT. 601/656, up to 12-bit Image Sensor Interface
– One USB Device High Speed, three USB Host High Speed with dedicated On-Chip Transceivers
– Two 10/100 Mbps Ethernet Mac Controller
– Two 4-bit Secure Digital MultiMedia Card Controller
– Two CAN Controllers
– One Quad I/O SPI Controller
– Two three-channel 32-bit Timers/Counters
– One high resolution (64-bit) Periodic Interval Timer
– One Synchronous Serial Controller
– One Inter-IC Sound Multi-Channel Controller with TDM support
– One Audio Class D Controller with single-ended or bridge-tied load connection to power stage
– One four-channel 16-bit PWM Controller
– Thirteen FLEXCOMs (USART, SPI and TWI)
– One 12-channel 12-bit Analog-to-Digital Converter with 4/5 wires resistive touchscreen support
• Hardware Cryptography
– SHA (SHA1, SHA224, SHA256, SHA384, SHA512) and HMAC: compliant with FIPS PUB 180-2
– AES: 256-, 192-, 128-bit key algorithms, compliant with FIPS PUB 197
– TDES: two-key or three-key algorithms, compliant with FIPS PUB 46-3
– True Random Number Generator, compliant with NIST Special Publication 800-22 Test Suite and FIPS
PUBs 140-2 and 140-3
• I/O Ports
– Four 32-bit Parallel Input/Output Controllers
– Up to 112 programmable I/O lines multiplexed with up to three peripheral I/Os
– Input change interrupt capability on each I/O line, optional Schmitt trigger input
– Individually programmable open-drain, pull-up and pull-down resistor, synchronous output
– General-purpose analog and digital inputs tolerant to positive and negative current injection
• Package
– 228-ball TFBGA 11x11 mm², 0.65 mm pitch, optimized for standard class PCB layout (down to four layers)
• Design for low ElectroMagnetic Interference (EMI)
– Slewrate-controlled I/Os
– DDR/SDR Phy with impedance-calibrated drivers
– Spread spectrum PLLs
– Careful BGA power/ground ball assignment to provide optimum decoupling capacitors placement
• Operating Conditions
– Ambient temperature range (TA): -40°C to +105°C
– Junction temperature range (TJ): -40°C to +125°C
© 2019 Microchip Technology Inc.
Complete Datasheet
DS60001579A-page 2


Features SAM9X60 Ultra-Low Power Arm® ARM926EJ-S ™ Processor-Based MPU, 600 MHz, Camer a, LCD, 2D Graphics, Dual 10/100 Ethern et, CAN, USB, QSPI, FLEXCOMs, AES, SHA Introduction The SAM9X60 is a high-per formance, ultra-low power ARM926EJ-S CP U-based embedded microprocessor (MPU) r unning up to 600 MHz, with support for multiple memories such as SDRAM, LP-SDR AM, LPDDR, DDR2, and QSPI and e.MMC Fla sh. The device integrates powerful peri pherals for connectivity and user inter face applications, and offers security functions (tamper detection, secure boo t program, secure key storage, etc.), T RNG, as well as highperformance crypto accelerators for AES and SHA. Features • CPU running up to 600 MHz – ARM92 6EJ-S Arm Thumb® processor – 32-Kbyt e data cache, 32-Kbyte instruction cach e, Memory Management Unit (MMU) • Mem ories – One 160-Kbyte internal ROM 64-Kbyte internal ROM embedding a sec ure bootloader program supporting boot on Nand Flash, SDCard, SPI or QSPI Flash. Bootloader features selectable by OTP.
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