ISO7821LLS Buffer Datasheet

ISO7821LLS Datasheet PDF, Equivalent


Part Number

ISO7821LLS

Description

Isolated Dual-LVDS Buffer

Manufacture

etcTI

Total Page 30 Pages
Datasheet
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ISO7821LLS
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ISO7821LLS
SLLSET5A – MARCH 2016 – REVISED SEPTEMBER 2016
ISO7821LLS High-Performance, 8000-VPK Reinforced Isolated Dual-LVDS Buffer
1 Features
2 Applications
1 Complies with TIA/EIA-644-A LVDS Standard
• Signaling Rate: 50 Mbps to 150 Mbps
• Optimized for DC-Balanced Data
• Wide Supply Range: 3 V to 5.5 V
• Wide Temperature Range: –55°C to 125°C
• Low-Power Consumption, Typical 10.3 mA per
Channel at 150 Mbps
• Low Propagation Delay: 17 ns Typical
• Industry leading CMTI(Min): ±100 kV/μs
• Robust Electromagnetic Compatibility (EMC)
• System-Level ESD, EFT, and Surge Immunity
• Low Emissions
• Isolation Barrier Life: > 40 Years
• SOIC-16 Wide Body (DW) and Extra-Wide Body
(DWW) Package Options
• Isolation Surge Withstand Voltage 12800 VPK
• Safety-Related Certifications:
– 8000-VPK Reinforced Isolation per DIN V VDE
V 0884–10 (VDE V 0884–10): 2006–12
– 5700-VRMS Isolation for 1 minute per UL 1577
– CSA Component Acceptance Notice 5A, IEC
60950–1 and IEC 60601–1 End Equipment
Standards
– TUV Certification per EN 61010-1 and EN
60950-1
– CQC Certification per GB4943.1–2011
– All Certifications are Planned
• Motor Control
• Test and Measurement
• Industrial Automation
• Medical Equipment
• Communication Systems
3 Description
The ISO7821LLS device is a high-performance,
isolated dual-LVDS buffer with 8000-VPK isolation
voltage. This device provides high electromagnetic
immunity and low emissions at low-power
consumption, while isolating the LVDS bus signal.
Each isolation channel has an LVDS receive and
transmit buffer. Timing performance for the
ISO7821LLS device is optimized for use with
communication systems that use DC-balanced data
streams which is achieved through an internal
distortion correction scheme.
The ISO7821LLS device has one forward and one
reverse-direction channel.
Through innovative chip design and layout
techniques, the electromagnetic compatibility of the
ISO7821LLS device has been significantly enhanced
to ease system-level ESD, EFT, surge, and
emissions compliance.
The ISO7821LLS device is available in a 16-pin SOIC
wide-body (DW) and extra-wide body (DWW)
packages.
Device Information(1)
PART NUMBER PACKAGE
BODY SIZE (NOM)
ISO7821LLS
DW (16)
DWW (16)
10.30 mm × 7.50 mm
10.30 mm × 14.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
VCCI
Isolation
Capacitor
VCCO
INx+
INx±
LVDS RX
LVDS TX
OUTx+
OUTx±
ENx
GNDI
GNDO
Copyright © 2016, Texas Instruments Incorporated
VCCI and GNDI are supply and ground connections respectively for the input channels.
VCCO and GNDO are supply and ground connections respectively for the output channels.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

ISO7821LLS
ISO7821LLS
SLLSET5A – MARCH 2016 – REVISED SEPTEMBER 2016
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ..................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information .................................................. 5
6.5 Power Ratings........................................................... 5
6.6 Insulation Specifications............................................ 6
6.7 Safety-Related Certifications..................................... 7
6.8 Safety Limiting Values .............................................. 7
6.9 DC Electrical Characteristics .................................... 8
6.10 DC Supply Current Characteristics ......................... 9
6.11 Timing Requirements for Distortion Correction
Scheme ...................................................................... 9
6.12 Switching Characteristics ...................................... 10
6.13 Insulation Characteristics Curves ......................... 11
6.14 Typical Characteristics .......................................... 12
7 Parameter Measurement Information ................ 14
8 Detailed Description ............................................ 17
8.1 Overview ................................................................. 17
8.2 Functional Block Diagram ....................................... 17
8.3 Feature Description................................................. 18
8.4 Device Functional Modes........................................ 19
9 Application and Implementation ........................ 20
9.1 Application Information............................................ 20
9.2 Typical Application .................................................. 20
10 Power Supply Recommendations ..................... 23
11 Layout................................................................... 24
11.1 Layout Guidelines ................................................. 24
11.2 Layout Example .................................................... 24
12 Device and Documentation Support ................. 25
12.1 Documentation Support ........................................ 25
12.2 Receiving Notification of Documentation Updates 25
12.3 Community Resources.......................................... 25
12.4 Trademarks ........................................................... 25
12.5 Electrostatic Discharge Caution ............................ 25
12.6 Glossary ................................................................ 25
13 Mechanical, Packaging, and Orderable
Information ........................................................... 25
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (March 2016) to Revision A
Page
• Changed the device status from Product Preview to Production Data and released full version of the data sheet .............. 1
2 Submit Documentation Feedback
Product Folder Links: ISO7821LLS
Copyright © 2016, Texas Instruments Incorporated


Features Product Folder Sample & Buy Technical Documents Tools & Software Support & Community ISO7821LLS SLLSET5A – MARC H 2016 – REVISED SEPTEMBER 2016 ISO78 21LLS High-Performance, 8000-VPK Reinfo rced Isolated Dual-LVDS Buffer 1 Featu res 2 Applications •1 Complies with TIA/EIA-644-A LVDS Standard • Signal ing Rate: 50 Mbps to 150 Mbps • Optim ized for DC-Balanced Data • Wide Supp ly Range: 3 V to 5.5 V • Wide Tempera ture Range: –55°C to 125°C • Low- Power Consumption, Typical 10.3 mA per Channel at 150 Mbps • Low Propagation Delay: 17 ns Typical • Industry lead ing CMTI(Min): ±100 kV/μs • Robust Electromagnetic Compatibility (EMC) • System-Level ESD, EFT, and Surge Immun ity • Low Emissions • Isolation Bar rier Life: > 40 Years • SOIC-16 Wide Body (DW) and Extra-Wide Body (DWW) Pac kage Options • Isolation Surge Withst and Voltage 12800 VPK • Safety-Relate d Certifications: – 8000-VPK Reinforc ed Isolation per DIN V VDE V 0884–10 (VDE V 0884–10): 2006–12 – 5700-VRMS Isolation for 1 minute per UL 1.
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