MC6805K3 MICROCOMPUTER Datasheet

MC6805K3 Datasheet PDF, Equivalent


Part Number

MC6805K3

Description

8-BIT MICROCOMPUTER

Manufacture

Motorola

Total Page 4 Pages
Datasheet
Download MC6805K3 Datasheet


MC6805K3
® MOTOROLA
MC680SK2
MC680SK3
Product Preview
8-BIT MICROCOMPUTER UNITS WITH
SERIAL PERIPHERAL INTERFACE AND TWO TIMERS
The MC6805K2/MC6805K3 microcomputer units are members of the
M6805 Family of low-cost single-chip microcomputers. These 8-bit
microcomputers contain a CPU, on-chip clock, ROM, EEPROM, RAM,
I/O, two timers, one programmable prescaler, and a serial peripheral in-
terface. These units are designed for the user who needs an economical
microcomputer with the proven capabilities of the M6800-based instruc-
tion set
HARDWARE FEATURES
• 32 Bidirectional TTL I/O Lines
Eight CMOS I/O Compatible
Eight LED liO Compatible
Eight Open Drain (Software Control)
• User ROM:
MC6805K2 - 2K Bytes
MC6805K3 - 3.6K Bytes
• 96 Bytes of User RAM, 16 Bytes on Standby via VSTBY Pin
• 128 Bytes of User EEPROM with Write/Erase Latches
• Self-Check Mode
• Serial Peripheral Interface
• Zero-Crossing Detect/ Interrupt
• Two Cascadable 8-Bit Timers with 7-Bit Software Programmable
Prescaler, Data Modulus Latch, and Capture Latch
• Auxiliary Counter with "WatChdog" Reset Feature
• 5-Volt Single Supply
• Two External Interrupts
SOFTWARE FEATURES
• 10 Powerful Addressing Modes
• Byte EffiCient Instruction Set with True Bit Manipulation, Bit Test,
and Branch Instructions
• Single Instruction Memory Examine/Change
• Powerful Indexed Addressing for Tables
• Full Set of Conditional Branches
• Memory Usable as Register / Flags
• User Callable Self-Check Subroutines
• Complete Development System Support on EXORciser, EXORset,
and HDS-200
USER SELECTABLE OPTIONS
• Eight Bidirectional I/O Lrnes With TTL or TTL/CMOS Interface
Option
• Crystal or Low-Cost Resistor OSCillator Option
• Low Voltage Inhibit Option
• Vectored Interrupts: Tlmer/SPI, Software, and External
• Eight Byte Standby RAM Option
HMOS
(HIGH DENSITY
N-CHANNEL, SILICON-GATE
DEPLETION LOAD)
8--SIT
MICROCOMPUTERS
L SUFFIX
CASE 715
~ PSUFFIX~ PLASTIC PACKAGE
CASE 711
~'I" ' '
I,
''
SSUFFIX
CERPID PACKAGE
CASE 734
I
PIN ASSIGNMENT
VSS
RESET
INTl
VCC
XTAL
EXTAl
VSTBY
Vpp
PCO
PCl
PC2
PC3
PC4
PC5
PC6
PC7
TIMERA/PD7
TCON1I1NT2/PD6
TIMERB/PD5
TCON2/PD4
PA7
PA6
PA5
PA4
PA3
PA2
PAl
PAO
PB7
PB6
PB5
PB4
PB3
PB2
PBl
PBO
PDO/SPISS
PD1/SPICl
PD2/SPID
PD3/SPID
This document contains information on a product under development Motorola reserves the
right to change or discontinue this product without notice
3-227

MC6805K3
MC6805K2-MC6805K3
I
FIGURE 1 - BLOCK DIAGRAM
=1 ~:~XTAL
EXTAL
Clock
« « « « « « « «f'...COl!)q-(I')N"-O
~~~~~~~~
I I I I II I I
Port A
DORA
r+
Timer A
Control I Data
H
Modulus
Latch
Capture
Latch
I
ITimer A
Prescaler
--PBO
PBl
PB2
-PB3
-PB4
--PB5
co co
a:
15 0
~0
PB6
--PB7
RESET
i'Nff
VCC
VSS
--
--
--
----PCO
PCl
PC2
-PC3
PC4
--PC5
PC6
-- -PC7
u
0
~
ua:
0
0
* User ROM
MC6805K2=2K Bytes
MC6805K3=3.6K Bytes
Accumulator
Index Register
Condition Code
Register
Stack Pointer
CPU
Control
Program
Counter
Low
Program
Counter
High
ALU
~
Timer B
Control I Data
Modulus
Latch
Capture
Latch
I
~
~
0a:
0
0
0
0
~
User
ROM
*
Self
Check
ROM
24Bx8
1-
IData
Address
Latch
Latch
EEPROM
128x8
I-- Vpp
RAM
96 x 8
I
SPI
Data/Clock
SPI
Control
VSTBY
PD7ITimer A
PD6/TCON1/1NT2
PD5/Timer B
PD4/TCON2
PD3/SPID
PD2/SPID
PDl/SPICL
PDO/SPISS
FIGURE 2 - PROGRAMMING MODEL
11 87
PCH
11
10101010\0\
A
x
PCL
54
SP
Accumulator
Index Register
Program Counter
o
Stack Pointer
Condition Code Register
Carry/Borrow
Zero
Negative
Interrupt Mask
Half Carry


Features ® MOTOROLA MC680SK2 MC680SK3 Product Preview 8-BIT MICROCOMPUTER UNITS WITH SERIAL PERIPHERAL INTERFACE AND TWO TI MERS The MC6805K2/MC6805K3 microcomput er units are members of the M6805 Famil y of low-cost single-chip microcomputer s. These 8-bit microcomputers contain a CPU, on-chip clock, ROM, EEPROM, RAM, I/O, two timers, one programmable presc aler, and a serial peripheral interface . These units are designed for the user who needs an economical microcomputer with the proven capabilities of the M68 00-based instruction set HARDWARE FEAT URES • 32 Bidirectional TTL I/O Line s Eight CMOS I/O Compatible Eight LED l iO Compatible Eight Open Drain (Softwar e Control) • User ROM: MC6805K2 - 2 K Bytes MC6805K3 - 3.6K Bytes • 96 B ytes of User RAM, 16 Bytes on Standby v ia VSTBY Pin • 128 Bytes of User EEP ROM with Write/Erase Latches • Self- Check Mode • Serial Peripheral Inter face • Zero-Crossing Detect/ Interru pt • Two Cascadable 8-Bit Timers with 7-Bit Software Programmable Prescaler, .
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