XM25QH32B FLASH Datasheet

XM25QH32B Datasheet PDF, Equivalent


Part Number

XM25QH32B

Description

3V 32M-BIT SERIAL NOR FLASH

Manufacture

XMC

Total Page 30 Pages
Datasheet
Download XM25QH32B Datasheet


XM25QH32B
XM25QH32B
3V 32M-BIT
SERIAL NOR FLASH WITH
DUAL AND QUAD SPI&QPI
Wuhan Xinxin Semiconductor Manufacturing Corp. Rev. M Issue Date: 2018/07/17

XM25QH32B
XM25QH32B
Contents
FEATURES ............................................................................................................................................................... 3
GENERAL DESCRIPTION...................................................................................................................................... 4
1. ORDERING INFORMATION ...................................................................................................................... 5
2. BLOCK DIAGRAM...................................................................................................................................... 6
3. CONNECTION DIAGRAMS ....................................................................................................................... 7
4. SIGNAL DESCRIPTIONS............................................................................................................................ 8
4.1. Serial Data Input (DI) / IO0................................................................................................................ 8
4.2. Serial Data Output (DO) / IO1............................................................................................................ 8
4.3. Serial Clock (CLK)............................................................................................................................. 8
4.4. Chip Select (CS#) ............................................................................................................................... 8
4.5. Write Protect (WP#) / IO2 .................................................................................................................. 9
4.6. HOLD (HOLD#) / IO3 ....................................................................................................................... 9
4.7. RESET (RESET#) / IO3 ..................................................................................................................... 9
5. MEMORY ORGANIZATION..................................................................................................................... 10
5.1. Flash Memory Array......................................................................................................................... 10
5.2. Security Registers ............................................................................................................................. 10
5.2.1 Security Register 0...................................................................................................................11
5.2.2 Serial Flash Discoverable Parameters (SFDP) Address Map ..................................................11
5.2.3 SFDP Header Field Definitions .............................................................................................. 12
5.2.4 JEDEC SFDP Basic SPI Flash Parameter............................................................................... 13
6. FUNCTION DESCRIPTION ...................................................................................................................... 18
6.1 SPI Operations ................................................................................................................................... 18
6.1.1 SPI Modes............................................................................................................................... 18
6.1.2 Dual SPI Modes ...................................................................................................................... 18
6.1.3 Quad SPI Modes ..................................................................................................................... 18
6.1.4 QPI Function........................................................................................................................... 19
6.1.5 Hold Function ......................................................................................................................... 19
6.1.6 Software Reset & Hardware RESET# pin .............................................................................. 19
6.2. Status Register .................................................................................................................................. 20
6.2.1 BUSY...................................................................................................................................... 22
6.2.2 Write Enable Latch (WEL) ..................................................................................................... 22
6.2.3 Block Protect Bits (BP2, BP1, BP0)....................................................................................... 22
6.2.4 Top / Bottom Block Protect (TB)............................................................................................ 22
6.2.5 Sector / Block Protect (SEC) .................................................................................................. 22
6.2.6 Complement Protect (CMP) ................................................................................................... 23
6.2.7 The Status Register Protect (SRP1, SRP0) ............................................................................. 23
6.2.8 Erase / Program Suspend Status (SUS)................................................................................... 23
6.2.9 Security Register Lock Bits (LB3, LB2, LB1, LB0) .............................................................. 23
6.2.10 Quad Enable (QE)................................................................................................................. 24
6.2.11 HOLD# or RESET# Pin Function (HRSW) ......................................................................... 24
6.2.12 Output Driver Strength (DRV1, DRV0)................................................................................ 24
6.2.13 High Frequency Mode Enable Bit (HFM) ............................................................................ 24
6.2.14 Latency Control (LC)............................................................................................................ 24
6.3. Write Protection ................................................................................................................................ 25
6.3.1 Write Protect Features............................................................................................................. 25
6.3.2 Block Protection Maps............................................................................................................ 27
6.4. Page Program.................................................................................................................................... 29
6.5. Sector Erase, Block Erase and Chip Erase........................................................................................ 29
6.6. Polling during a Write, Program or Erase Cycle............................................................................... 29
6.7. Active Power, Stand-by Power and Deep Power-Down Modes ....................................................... 29
7. INSTRUCTIONS ........................................................................................................................................ 30
7.1 Configuration and Status Commands ................................................................................................ 35
7.1.1 Read Status Register (05h/35h/15h) ....................................................................................... 35
7.1.2 Write Enable (06h).................................................................................................................. 35
Wuhan Xinxin Semiconductor Manufacturing Corp. Rev. M Issue Date: 2018/07/17
1


Features XM25QH32B 3V 32M-BIT SERIAL NOR FLASH WI TH DUAL AND QUAD SPI&QPI Wuhan Xinxin S emiconductor Manufacturing Corp. Rev. M Issue Date: 2018/07/17 XM25QH32B Con tents FEATURES ....................... ....................................... ....................................... ....................................... ................... 3 GENERAL DESCRIPTI ON..................................... ....................................... ....................................... ................... 4 1. ORDERING INFOR MATION ................................ ....................................... ....................................... ........ 5 2. BLOCK DIAGRAM............ ....................................... ....................................... ....................................... ..... 6 3. CONNECTION DIAGRAMS ........ ....................................... ....................................... ................................. 7 4. SIGNAL DESCRIPTIONS.............................................
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