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MKM33Z128CLH5 Dataheets PDF



Part Number MKM33Z128CLH5
Manufacturers NXP
Logo NXP
Description 50MHz Cortex-M0+ Metrology MCU
Datasheet MKM33Z128CLH5 DatasheetMKM33Z128CLH5 Datasheet (PDF)

Freescale Semiconductor Data Sheet: Technical Data Document Number: MKMxxZxxCxx5 Rev. 7, 01/2014 KM Family Supports the following: MKM14Z64CHH5, MKM14Z128CHH5, MKM33Z64CLH5, MKM33Z128CLH5, MKM33Z64CLL5, MKM33Z128CLL5, MKM34Z128CLL5 Features • Operating Characteristics – Voltage range: 1.71 V to 3.6 V (when Analog Front End (AFE) is not used) – Voltage range: 2.7 V to 3.6 V (when Analog Front End (AFE) is used) – iRTC battery supply voltage range: 1.71 to 3.6 V – Flash write voltage range: 1.71.

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Freescale Semiconductor Data Sheet: Technical Data Document Number: MKMxxZxxCxx5 Rev. 7, 01/2014 KM Family Supports the following: MKM14Z64CHH5, MKM14Z128CHH5, MKM33Z64CLH5, MKM33Z128CLH5, MKM33Z64CLL5, MKM33Z128CLL5, MKM34Z128CLL5 Features • Operating Characteristics – Voltage range: 1.71 V to 3.6 V (when Analog Front End (AFE) is not used) – Voltage range: 2.7 V to 3.6 V (when Analog Front End (AFE) is used) – iRTC battery supply voltage range: 1.71 to 3.6 V – Flash write voltage range: 1.71 to 3.6 V – Temperature range (ambient): -40°C to 85°C • Performance – Up to 50 MHz ARM Cortex-M0+ core delivering 0.95 Dhrystone MIPS per MHz • Memories and memory interfaces – 128/64 KB program flash memory. There is no FlexMemory on these devices – 16 KB of single access RAM • Clocks – 1 to 32 MHz crystal oscillator – 32 kHz crystal oscillator – Multi-purpose clock generator • System peripherals – Multiple low-power modes to provide power optimization based on application requirements – Memory protection unit with multi-master protection – 4-channel DMA controller, supporting up to 64 request sources – External watchdog monitor – Robust watchdog monitor – Low-leakage wakeup unit – Asynchronous wakeup unit – Peripheral Crossbar (allows internal signals to be connected to other on-chip modules) MKMxxZxxCxx5 • Security and integrity modules – Hardware programmable CRC module to support fast cyclic redundancy checks – Hardware random-number generator – 128-bit unique identification (ID) number per chip • Human-machine interface – Segment LCD controller supporting up to 36 frontplanes and 8 backplanes or 40 frontplanes and 4 backplanes – General-purpose input/output which can acts as Rapid GPIO (single cycle access) • Analog modules – 16-bit SAR ADC – 24-bit Analog Front End comprising of 24-bit Sigma Delta ADCs (after averaging) – Programmable Gain Amplifier (PGA with gains upto 32) – Two analog comparators (CMP) containing a 6-bit DAC and programmable reference input – 1.2V Voltage reference • Timers – 4 channel Quad Timer with 16-bit counters – Periodic interrupt timers – 16-bit low-power timer – Independent Real Time Clock with calendaring and compensation • Communication interfaces – One SPI module with FIFO support (supports 5V AMR operation) – One SPI module without FIFO (no AMR operation) – Two I2C modules with SMBus support – Two UART modules with ISO7816 support and Two UART without ISO 7816 support – Any one SCI can be used for IrDA operation. 5V AMR support on one SCI. Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. © 2011–2014 Freescale Semiconductor, Inc. KM Family Data Sheet, Rev. 7, 01/2014. 2 Freescale Semiconductor, Inc. Table of Contents 1 Ordering parts...........................................................................4 5.3 Switching specifications.....................................................18 1.1 Determining valid order-able parts....................................4 5.3.1 Device clock specifications...................................18 2 Part identification......................................................................4 5.3.2 General switching specifications...........................18 2.1 Description.........................................................................4 5.4 Thermal specifications.......................................................19 2.2 Format...............................................................................4 5.4.1 Thermal operating requirements...........................19 2.3 Fields.................................................................................4 5.4.2 Thermal attributes.................................................19 2.4 Example............................................................................5 6 Peripheral operating requirements and behaviors....................20 3 Terminology and guidelines......................................................5 6.1 Core modules....................................................................21 3.1 Definition: Operating requirement......................................5 6.1.1 Single Wire Debug (SWD)....................................21 3.2 Definition: Operating behavior...........................................6 6.1.2 Analog Front End (AFE)........................................21 3.3 Definition: Attribute............................................................6 6.2 Clock modules...................................................................22 3.4 Definition: Rating...............................................................7 6.2.1 MCG specifications...............................................22 3.5 Result of exceeding a rating..............................................7 6.2.2 Oscillator electrical specifications..................


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