CSD87502Q2 MOSFETs Datasheet

CSD87502Q2 Datasheet PDF, Equivalent


Part Number

CSD87502Q2

Description

30V Dual N-Channel NexFET Power MOSFETs

Manufacture

etcTI

Total Page 13 Pages
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CSD87502Q2
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CSD87502Q2
SLPS560 – DECEMBER 2015
CSD87502Q2 30 V Dual N-Channel NexFET™ Power MOSFETs
1 Features
1 Low On-Resistance
• Dual Independent MOSFETs
• Space Saving SON 2 × 2 mm Plastic Package
• Optimized for 5 V Gate Driver
• Avalanche Rated
• Pb and Halogen Free
• RoHS Compliant
2 Applications
• Point-of-Load Synchronous Buck Converter for
Applications in Networking, Telecom, and
Computing Systems
• Adaptor or USB Input Protection for Notebook
PCs and Tablets
• Battery Protection
Product Summary
TA = 25°C
VDS Drain-to-Source Voltage
Qg Gate Charge Total (4.5 V)
Qgd Gate Charge Gate to Drain
RDS(on) Drain-to-Source On Resistance
VGS(th) Threshold Voltage
TYPICAL VALUE
30
2.2
0.5
VGS = 3.8 V
VGS = 4.5 V
VGS = 10 V
1.6
42.0
35.5
27.0
UNIT
V
nC
nC
m
m
m
V
DEVICE
CSD87502Q2
CSD87502Q2T
.
Ordering Information(1)
MEDIA
QTY PACKAGE
7-Inch Reel
7-Inch Reel
3000 SON 2 x 2 mm
250 Plastic Package
SHIP
Tape and
Reel
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
3 Description
The CSD87502Q2 is a 30 V, 27 mN-Channel
device with dual independent MOSFETs in a SON 2 x
2 mm plastic package. The two FETs were designed
to be used in a half-bridge configuration for
synchronous buck and other power supply
applications. Additionally, these NexFET™ power
MOSFETs can be used for adaptor, USB input
protection, and battery charging applications. The
dual FETs feature low drain-to-source on-resistance
that minimizes losses and offers low component
count for space-constrained applications.
Top View and Circuit Image
S1 D1
D1
Drain
Drain
Absolute Maximum Ratings
TA = 25°C
VDS Drain-to-Source Voltage
VGS Gate-to-Source Voltage
ID Continuous Drain Current (Package limited)
IDM Pulsed Drain Current(1)
PD Power Dissipation(2)
TJ, Operating Junction Temperature,
Tstg Storage Temperature
EAS
Avalanche Energy, single pulse
ID = 7.9 A, L = 0.1 mH, RG = 25
VALUE
30
±20
5.0
23
2.3
–55 to 150
3.1
UNIT
V
V
A
A
W
°C
mJ
(1) Max RθJA = 185 °C/W, pulse duration 100 μs, duty cycle
1%.
(2) Typical RθJA = 55 °C/W on a 1 inch2, 2 oz. Cu pad on a 0.06
inch thick FR4 PCB.
G1 G2 Gate
D2
D2 S2
Gate
Source
Source
RDS(on) vs VGS
80
TC = 25°C, I D = 4 A
70 TC = 125°C, I D = 4 A
60
50
40
30
20
10
0
0 2 4 6 8 10 12 14 16 18 20
VGS - Gate-to-Source Voltage (V)
D007
1
Gate Charge
10
9
ID = 4 A
VDS = 15 V
8
7
6
5
4
3
2
1
0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
Qg - Gate Charge (nC)
D004
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

CSD87502Q2
CSD87502Q2
SLPS560 – DECEMBER 2015
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Specifications......................................................... 3
5.1 Electrical Characteristics........................................... 3
5.2 Thermal Information .................................................. 3
5.3 Typical MOSFET Characteristics.............................. 4
6 Device and Documentation Support.................... 7
6.1 Community Resources.............................................. 7
6.2 Trademarks ............................................................... 7
6.3 Electrostatic Discharge Caution ................................ 7
6.4 Glossary .................................................................... 7
7 Mechanical, Packaging, and Orderable
Information ............................................................. 8
7.1 Package Dimensions ................................................ 8
7.2 PCB Land Pattern ..................................................... 9
7.3 Recommended Stencil Opening ............................... 9
7.4 Q2 Tape and Reel Information................................ 10
4 Revision History
DATE
December 2015
REVISION
*
NOTES
Initial release.
2 Submit Documentation Feedback
Product Folder Links: CSD87502Q2
Copyright © 2015, Texas Instruments Incorporated


Features Product Folder Sample & Buy Technical Documents Tools & Software Support & Community CSD87502Q2 SLPS560 – DECEM BER 2015 CSD87502Q2 30 V Dual N-Channel NexFET™ Power MOSFETs 1 Features 1 Low On-Resistance • Dual Independe nt MOSFETs • Space Saving SON 2 × 2 mm Plastic Package • Optimized for 5 V Gate Driver • Avalanche Rated • P b and Halogen Free • RoHS Compliant 2 Applications • Point-of-Load Synchro nous Buck Converter for Applications in Networking, Telecom, and Computing Sys tems • Adaptor or USB Input Protectio n for Notebook PCs and Tablets • Batt ery Protection Product Summary TA = 2 5°C VDS Drain-to-Source Voltage Qg Gat e Charge Total (4.5 V) Qgd Gate Charge Gate to Drain RDS(on) Drain-to-Source O n Resistance VGS(th) Threshold Voltage TYPICAL VALUE 30 2.2 0.5 VGS = 3.8 V VGS = 4.5 V VGS = 10 V 1.6 42.0 35. 5 27.0 UNIT V nC nC mΩ mΩ mΩ V DEVICE CSD87502Q2 CSD87502Q2T . Orderi ng Information(1) MEDIA QTY PACKAGE 7-Inch Reel 7-Inch Reel 3000 SON 2 x 2 mm 250 Plastic P.
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