LSF0204 Translator Datasheet

LSF0204 Datasheet PDF, Equivalent


Part Number

LSF0204

Description

4-Bits Bidirectional Multi-Voltage Level Translator

Manufacture

etcTI

Total Page 30 Pages
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LSF0204
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LSF0204, LSF0204D
SLVSCP5G – JULY 2014 – REVISED NOVEMBER 2019
LSF0204x 4-Bits Bidirectional Multi-Voltage Level Translator for Open-Drain and Push-
Pull Application
1 Features
1 Provides bidirectional voltage translation with no
direction terminal
• Supports up to 100-MHz up translation and
greater than 100-MHz down translation
at 30-pF capacitor load and up to 40-MHz
up/down translation at 50-pF capacitor load
• Supports Ioff, partial power-down mode (refer to
Feature Description)
• Allows bidirectional voltage level translation
between
– 0.8 V 1.8, 2.5, 3.3, 5 V
– 1.2 V 1.8, 2.5, 3.3, 5 V
– 1.8 V 2.5, 3.3, 5 V
– 2.5 V 3.3, 5 V
– 3.3 V 5 V
• Low standby current
• 5 V Tolerance I/O port to support TTL
• Low Ron provides less signal distortion
• High-impedance I/O terminals for EN = Low
• Flow-through pinout for easy PCB trace routing
• Latch-up performance exceeds 100 mA per
JESD17
• –40°C to 125°C operating temperature range
• ESD performance tested per JESD 22
– 2000-V human-body model (A114-B, Class II)
– 200-V machine model (A115-A)
– 1000-V charged-device model (C101)
2 Applications
• GPIO, MDIO, PMBus, SMBus, SDIO, UART, I2C,
and Other Interfaces in Telecom Infrastructure
• Industrial
• Automotive
• Personal Computing
3 Description
The LSF family consists of bidirectional voltage level
translators that operate from 0.8 V to 4.5 V (Vref_A)
and 1.8 V to 5.5 V (Vref_B). This range allows for
bidirectional voltage translations between 0.8 V and
5.0 V without the need for a direction terminal in
open-drain or push-pull applications. The LSF family
supports level translation applications with
transmission speeds greater than 100 MHz for open-
drain systems that utilize a 15-pF capacitance and
165-Ω pull-up resistor.
When the An or Bn port is LOW, the switch is in the
ON-state and a low resistance connection exists
between the An and Bn ports. The low Ron of the
switch allows connections to be made with minimal
propagation delay and signal distortion. The voltage
on the A or B side will be limited to Vref_A and can
be pulled up to any level between Vref_A and 5 V.
This functionality allows a seamless translation
between higher and lower voltages selected by the
user without the need for directional control.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
TSSOP (14)
5.00 mm × 4.40 mm
LSF0204x
UQFN (12)
VQFN (14)
2.00 mm × 1.70 mm
3.50 mm × 3.50 mm
DSBGA (12)
1.90 mm × 1.40 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Simplified Schematic
Vref_A
Vref_B
LSF0204
EN
A1 SW B1
A2 SW B2
A3 SW B3
A4 SW B4
GND
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

LSF0204
LSF0204, LSF0204D
SLVSCP5G – JULY 2014 – REVISED NOVEMBER 2019
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Description (continued)......................................... 4
6 Pin Configuration and Functions ......................... 4
7 Specifications......................................................... 6
7.1 Absolute Maximum Ratings ...................................... 6
7.2 ESD Ratings.............................................................. 6
7.3 Recommended Operating Conditions....................... 6
7.4 Thermal Information ................................................. 6
7.5 Electrical Characteristics........................................... 7
7.6 Switching Characteristics: AC Performance
(Translating Down, 3.3 V to 1.8 V) ........................... 7
7.7 Switching Characteristics: AC Performance
(Translating Down, 3.3 V to 1.2 V) ........................... 8
7.8 Switching Characteristics: AC Performance
(Translating Up, 1.8 V to 3.3 V) ................................ 8
7.9 Switching Characteristics: AC Performance
(Translating Up, 1.2 V to 1.8 V) ................................ 8
7.10 Typical Characteristics ............................................ 8
8 Parameter Measurement Information .................. 9
8.1 Load Circuit AC Waveform for Outputs .................. 10
9 Detailed Description ............................................ 11
9.1 Overview ................................................................. 11
9.2 Functional Block Diagram ....................................... 11
9.3 Feature Description................................................. 12
9.4 Device Functional Modes........................................ 12
10 Application and Implementation........................ 13
10.1 Application Information.......................................... 13
10.2 Typical Applications .............................................. 13
11 Power Supply Recommendations ..................... 19
12 Layout................................................................... 19
12.1 Layout Guidelines ................................................. 19
12.2 Layout Example .................................................... 19
13 Device and Documentation Support ................. 21
13.1 Related Links ........................................................ 21
13.2 Support Resources ............................................... 21
13.3 Trademarks ........................................................... 21
13.4 Electrostatic Discharge Caution ............................ 21
13.5 Glossary ................................................................ 21
14 Mechanical, Packaging, and Orderable
Information ........................................................... 21
14.1 Package Option Addendum .................................. 22
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision F (January 2019) to Revision G
Page
• Changed Vref_A/B/EN max voltage to 5.5 V in the Recommended Operating Conditions table ................................................ 6
Changes from Revision E (December 2018) to Revision F
Page
• Changed location of YZP-package indicator dot to A3 position. ........................................................................................... 4
• Added YZP package to Thermal Information table ................................................................................................................ 6
Changes from Revision D (December 2015) to Revision E
Page
• Changed location of YZP-package A1-pin indicator dot. View is looking through the device, as in an X-ray. ..................... 4
Changes from Revision C (August 2015) to Revision D
Page
• Added Type Column to Pin Functions table ........................................................................................................................... 5
• Added Junction Temperatures to Thermal Information table ................................................................................................. 6
Changes from Revision B (April 2015) to Revision C
Page
• Removed bullet "Less than 1.5 ns max propagation delay" from Features. .......................................................................... 1
• Updated "Supports High Speed Translation, Greater Than 100 MHz" bullet in Features. .................................................... 1
2 Submit Documentation Feedback
Copyright © 2014–2019, Texas Instruments Incorporated
Product Folder Links: LSF0204 LSF0204D


Features Product Folder Order Now Technical Doc uments Tools & Software Support & Com munity LSF0204, LSF0204D SLVSCP5G – JULY 2014 – REVISED NOVEMBER 2019 LSF 0204x 4-Bits Bidirectional Multi-Voltag e Level Translator for Open-Drain and P ushPull Application 1 Features •1 Pr ovides bidirectional voltage translatio n with no direction terminal • Suppor ts up to 100-MHz up translation and gre ater than 100-MHz down translation at 30-pF capacitor load and up to 40-MH z up/down translation at 50-pF capacito r load • Supports Ioff, partial power -down mode (refer to Feature Descriptio n) • Allows bidirectional voltage lev el translation between – 0.8 V ↔ 1. 8, 2.5, 3.3, 5 V – 1.2 V ↔ 1.8, 2.5 , 3.3, 5 V – 1.8 V ↔ 2.5, 3.3, 5 V – 2.5 V ↔ 3.3, 5 V – 3.3 V ↔ 5 V • Low standby current • 5 V Toler ance I/O port to support TTL • Low Ro n provides less signal distortion • H igh-impedance I/O terminals for EN = Lo w • Flow-through pinout for easy PCB trace routing • Latch-up performance exceeds 100 mA per JESD17 • –40.
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