LPC18S50

LPC18S50/S30/S10 32-bit ARM Cortex-M3 flashless MCU with security features; up to 200 kB SRAM; Ethernet, two HS USB, LCD, EMC, AES Rev. 1.3 — 10 January 2020 Product data sheet 1. General description The LPC18S50/S30/S10 are ARM Cortex-M3 based microcontrollers with security features for embedded applications. The ARM Cortex-M3 is a next generation core that offers system enhancements such as low power consumption, enhanced debug features, and a high level of support block integration. The LPC18S50/S30/S10 operate at CPU frequencies of up to 180 MHz. The ARM Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals. The ARM Cortex-M3 CPU also includes an internal prefetch unit that supports speculative branching. The LPC18S50/S30/S10 include up to 200 kB of on-chip SRAM, security features with AES engine, a quad SPI Flash Interface (SPIFI), a State Configurable Timer/PWM (SCTimer/PWM) subsystem, two High-speed USB controllers, Ethernet, LCD, an external memory controller, and multiple digital and analog peripherals. See Section 17 “References” for additional documentation. 2. Features and benefits  Processor core  ARM Cortex-M3 processor, running at frequencies of up to 180 MHz.  ARM Cortex-M3 built-in Memory Protection Unit (MPU) supporting eight regions.  ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC).  Non-maskable Interrupt (NMI) input.  ...