EDI8M8130C80

~EDI EDIBMB130C50160170lBO 12BKxB Static RAM CMOS, Module Features The EDI8M8130C is a 1024K bit CMOS Static RAM Module based on four 32Kx8 Static RAMs in leadless chip carriers mounted on a multi-layered ceramic substrate. The EDI8M8130C has an on-board decoder circuit that interprets the higher order address to select one of the 32Kx8 Static RAMs. TheE and Slines perform the chip enable functions that automatically power down the device when proper logic levels are applied. All inputs and outputs are TTL compatible and operate from a5V supply. Fully asynchronous, the EDI8M8130C requires no clocks or refreshing for operation. EDI Military Modules are constructed using semiconductor components which have been 100% processed to the test methods of MIL-STD-883C, Class B. 128Kx8 bit CMOS Static Random Access Memory Access Times 50, 60, 70, and 80ns E, S, and GFunctions for Bus Control Data Retention Function Inputs and Outputs Directly TTL Compatible Fully Static, No Clocks Jedec Approved Pinout 32 Pin Ceramic Dual-in-line Package Single +5V (±10%) Supply Operation Pin Configurations and Block Diagram Pin Names NC 1 A16 2 A14 3 A124 A7 5 A6 6 A5 7 A4 8 A3 9 A210 Al11 AI2I12 00013 00114 00215 VSS16 A0-A16 E S W G DQ0-DQ7 VCC VSS Address Inputs Chip Enable Chip Select Write Enable Output Enable Data Input/Output Power (+5V±1 0%) Ground (4) 32 VCC 31 A15 30 S 29 Vi 28 A13 27 A8 26 A9 25 All 24 G 23 Al0 22T 21 007 20 ooe 19 005 18 004 17 003 +-_ _ _ _-,A0-A14...