SHC298 AMPLIFIER Datasheet

SHC298 Datasheet, PDF, Equivalent


Part Number

SHC298

Description

SAMPLE/HOLD AMPLIFIER

Manufacture

Burr-Brown

Total Page 8 Pages
Datasheet
Download SHC298 Datasheet


SHC298
® SHC298
SHC298A
Monolithic
SAMPLE/HOLD AMPLIFIER
FEATURES
q 12-BIT THROUGHPUT ACCURACY
q LESS THAN 10µs ACQUISITION TIME
q WIDEBAND NOISE LESS THAN 20µVrms
q RELIABLE MONOLITHIC CONSTRUCTION
q 1010INPUT RESISTANCE
q TTL-CMOS-COMPATIBLE LOGIC INPUT
Offset Adjust
2
30k
Analog 3
Input
Logic 8
Logic 7
Reference
A2 5 Output
A1
150
6 Hold
Capacitor
C1
Mode Control (S/H) Input
DESCRIPTION
The SHC298 and SHC298A are high-performance
monolithic sample/hold amplifiers featuring high DC
accuracy with fast acquisition times and a low droop
rate. Dynamic performance and holding performance
can be optimized with proper selection of the external
holding capacitor. With a 1000pF holding capacitor,
12-bit accuracy can be achieved with a 6µs acquisition
time. Droop rates less than 5mV/min are possible with
a 1µF holding capacitor.
These sample/holds will operate over a wide supply
voltage ranging from ±5V to ±18V with very little
change in performance. A separate Offset Adjust pin
is used to adjust the offset in either the Sample on the
Hold modes. The fully differential logic inputs have
low input current, and are compatible with TTL, 5V
CMOS, and CMOS logic families.
The SHC298AM is available in a hermetically sealed
8-pin TO-99 package and is specified over a tempera-
ture range from –25°C to +85°C. The SHC298JP and
SHC298JU are 8-pin plastic DIP and SOIC packaged
parts specified over 0°C to +70°C.
The SHC298AJP, specified over 0°C to +70°C, is
available in an 8-pin plastic DIP. The SHC298A grade
features improved gain and offset error, improved drift
over temperature, and faster acquisition time.
The SHC298 family is a price-performance bargain. It
is well suited for use with several 12-bit A/D convert-
ers in data acquisition systems, data distribution
systems, and analog delay circuits.
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
© 1977 Burr-Brown Corporation
PDS-373E
Printed in U.S.A. August, 1996

SHC298
SPECIFICATIONS
ELECTRICAL
At TJ = +25°C, ±15V supplies, 1000pF holding capacitor, –11.5V VIN +11.5, RL = 10k, Logic Reference Voltage = 0V, and Logic Voltage = 2.5 V, unless
otherwise noted.
PARAMETER
ANALOG INPUT
Resistance
Bias Current(1)
DIGITAL INPUT
Mode Control Truth Table
Mode Control and Mode Control Reference Input Current
Differential Logic Threshold
TRANSFER CHARACTERISTICS
ACCURACY (+25°C)
Gain
Gain Error
Input Voltage Offset (adjust to zero)(1)
Droop Rate(1)
Power Supply Rejection
ACCURACY DRIFT
Gain Drift
Input Offset Drift
Droop Rate at TJ = +85°C
DYNAMIC CHARACTERISTICS
Aperture Time : Negative Input Step
Positive Input Step
Acquisition Time (C = 1000pF): to ±0.1%, 10V Step
Sample/Hold Transient: Peak Amplitude
Settling to 1mV
Feedthrough (Response to 10V Input Step)
OUTPUT
ANALOG OUTPUT
Voltage Range
Current Range
Impedance (in Hold Mode)
POWER SUPPLY
Rate Voltage
Range
Current(1)
SHC298AM, JP, JU
MIN
TYP
MAX
SHC298AJP
MIN
TYP
MAX
1010
10
Pin 7
0V
0V
+2.4V
+0.8V
0.8 1.4
50
Pin 8
+2.4V
+0.8V
+2.8V
+2.8V
10
2.4
T
T 25
Circuit State
Sample (Track)
Hold
Hold
Sample (Track)
+1
±0.004
±2
±30
±25
±0.010
±7
±100
34
15 70
10
200
150
5
160
1
±0.007
T
±0.001
±1
T
T
±0.005
±2
T
12
T 25
T
T
T
4
T
T
±0.004
6
±11.5
±2
0.5
4
15
±5 ±18
±4.5 ±6.5
T
T
T
T
T
T
T
TT
UNITS
nA
µA
V
V/V
%
mV
µV/ms
µV/V
ppm/°C
µV/°C
mV/ms
ns
ns
µs
mV
µs
% of 20V
V
mA
VDC
VDC
mA
T Same as specifications for SHC298AM, JP, JU.
NOTES: (1) These parameters guaranteed over a supply voltage range of ±5V to = ±18V. (2) Charge offset is sensitive to stray capacitive coupling between input
logic signals and the hold capacitor. 1pF, for instance, will create an additional 0.5mV step with a 5V logic swing and a 0.01µF hold capacitor. Magnitude of the
charge offset is inversely proportional to hold capacitor value.
®
SHC298/298A
2


Features ® SHC298 SHC298A Monolithic SAMPLE/HOL D AMPLIFIER FEATURES q 12-BIT THROUGHP UT ACCURACY q LESS THAN 10µs ACQUISITI ON TIME q WIDEBAND NOISE LESS THAN 20µ Vrms q RELIABLE MONOLITHIC CONSTRUCTION q 1010Ω INPUT RESISTANCE q TTL-CMOS- COMPATIBLE LOGIC INPUT Offset Adjust 2 30kΩ Analog 3 Input Logic 8 Logic 7 Reference A2 5 Output A1 150Ω 6 Hold Capacitor C1 Mode Control (S/H) Input DESCRIPTION The SHC298 and SHC29 8A are high-performance monolithic samp le/hold amplifiers featuring high DC ac curacy with fast acquisition times and a low droop rate. Dynamic performance a nd holding performance can be optimized with proper selection of the external holding capacitor. With a 1000pF holdin g capacitor, 12-bit accuracy can be ach ieved with a 6µs acquisition time. Dro op rates less than 5mV/min are possible with a 1µF holding capacitor. These s ample/holds will operate over a wide su pply voltage ranging from ±5V to ±18V with very little change in performance. A separate Offset Adjust pin is use.
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