ADS8688 ADC Datasheet

ADS8688 Datasheet, PDF, Equivalent


Part Number

ADS8688

Description

SAR ADC

Manufacture

etcTI

Total Page 30 Pages
Datasheet
Download ADS8688 Datasheet


ADS8688
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ADS8684, ADS8688
SBAS582C – JULY 2014 – REVISED APRIL 2015
ADS868x 16-Bit, 500-kSPS, 4- and 8-Channel, Single-Supply, SAR ADCs with
Bipolar Input Ranges
1 Features
1 16-Bit ADCs with Integrated Analog Front-End
• 4-, 8-Channel MUX with Auto and Manual Scan
• Channel-Independent Programmable Input
Ranges:
– Bipolar: ±10.24 V, ±5.12 V, ±2.56 V
– Unipolar: 10.24 V, 5.12 V
• 5-V Analog Supply: 1.65-V to 5-V I/O Supply
• Constant Resistive Input Impedance: 1 MΩ
• Input Overvoltage Protection: Up to ±20 V
• On-Chip, 4.096-V Reference with Low Drift
• Excellent Performance:
– 500-kSPS Aggregate Throughput
– DNL: ±0.5 LSB; INL: ±0.75 LSB
– Low Drift for Gain Error and Offset
– SNR: 92 dB; THD: –102 dB
– Low Power: 65 mW
• AUX Input Direct Connection to ADC Inputs
• SPI™-Compatible Interface with Daisy-Chain
• Industrial Temperature Range: –40°C to 125°C
• TSSOP-38 Package (9.7 mm × 4.4 mm)
Simplified Block Diagram
1 M:
AIN_0P
OVP
AIN_0GND
OVP
1 M:
1 M:
AIN_1P
OVP
AIN_1GND
OVP
1 M:
1 M:
AIN_2P
OVP
AIN_2GND
OVP
1 M:
1 M:
AIN_3P
OVP
AIN_3GND
OVP
1 M:
1 M:
AIN_4P
OVP
AIN_4GND
OVP
1 M:
1 M:
AIN_5P
OVP
AIN_5GND
OVP
1 M:
1 M:
AIN_6P
OVP
AIN_6GND
OVP
1 M:
1 M:
AIN_7P
OVP
AIN_7GND
OVP
1 M:
AUX_IN
AUX_GND
AVDD
DVDD
PGA
2nd-Order
LPF
ADC
Driver
VB0
PGA
2nd-Order
LPF
ADC
Driver
VB1
PGA
2nd-Order
LPF
ADC
Driver
VB2
PGA
2nd-Order
LPF
ADC
Driver
VB3
PGA
2nd-Order
LPF
ADC
Driver
VB4
PGA
2nd-Order
LPF
ADC
Driver
VB5
PGA
2nd-Order
LPF
ADC
Driver
VB6
PGA
2nd-Order
LPF
ADC
Driver
VB7
ADS8688
ADS8684
Digital
Logic
&
Interface
16-bit
SAR ADC
Oscillator
CS
SCLK
SDI
SDO
DAISY
REFSEL
RST / PD
4.096V
Reference
REFCAP
REFIO
AGND
DGND
REFGND
1
2 Applications
• Power Automation
• Protection Relays
• PLC Analog Input Modules
3 Description
The ADS8684 and ADS8688 are 4- and 8-channel,
integrated data acquisition systems based on a 16-bit
successive approximation (SAR) analog-to-digital
converter (ADC), operating at a throughput of
500-kSPS. The devices feature integrated analog
front-end circuitry for each input channel with
overvoltage protection up to ±20 V, a 4- or 8-channel
multiplexer with automatic and manual scanning
modes, and an on-chip, 4.096-V reference with low
temperature drift. Operating on a single 5-V analog
supply, each input channel on the devices can
support true bipolar input ranges of ±10.24 V,
±5.12 V, and ±2.56 V, as well as unipolar input
ranges of 0 V to 10.24 V and 0 V to 5.12 V. The gain
of the analog front-end for all input ranges is
accurately trimmed to ensure a high dc precision. The
input range selection is software-programmable and
independent for each channel. The devices offer a
1-MΩ constant resistive input impedance irrespective
of the selected input range.
The ADS8684 and ADS8688 offer a simple SPI-
compatible serial interface to the digital host and also
support daisy-chaining of multiple devices. The digital
supply operates from 1.65 V to 5.25 V, enabling
direct interface to a wide range of host controllers.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
ADS868x
TSSOP (38)
9.70 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Gain Error versus Temperature
0.05
0.03
0.01
----- ± 2.5*VREF
----- ± 1.25*VREF
----- ± 0.625*VREF
------ +2.5*VREF
------+1.25*VREF
-0.01
-0.03
-0.05
±40
±7 26 59 92
Free-Air Temperature (oC)
125
C026
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

ADS8688
ADS8684, ADS8688
SBAS582C – JULY 2014 – REVISED APRIL 2015
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Device Comparison Table..................................... 4
6 Pin Configuration and Functions ......................... 4
7 Specifications......................................................... 6
7.1 Absolute Maximum Ratings ...................................... 6
7.2 ESD Ratings.............................................................. 6
7.3 Recommended Operating Conditions....................... 6
7.4 Thermal Information .................................................. 6
7.5 Electrical Characteristics........................................... 7
7.6 Timing Requirements: Serial Interface.................... 11
7.7 Typical Characteristics ............................................ 12
8 Detailed Description ............................................ 21
8.1 Overview ................................................................. 21
8.2 Functional Block Diagram ....................................... 21
8.3 Feature Description................................................. 22
8.4 Device Functional Modes........................................ 32
8.5 Register Maps ......................................................... 45
9 Application and Implementation ........................ 52
9.1 Application Information............................................ 52
9.2 Typical Applications ................................................ 52
10 Power-Supply Recommendations ..................... 57
11 Layout................................................................... 57
11.1 Layout Guidelines ................................................. 57
11.2 Layout Example .................................................... 58
12 Device and Documentation Support ................. 59
12.1 Documentation Support ........................................ 59
12.2 Related Links ........................................................ 59
12.3 Trademarks ........................................................... 59
12.4 Electrostatic Discharge Caution ............................ 59
12.5 Glossary ................................................................ 59
13 Mechanical, Packaging, and Orderable
Information ........................................................... 59
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (August 2014) to Revision C
Page
• Changed unipolar sub-bullet of third Features bullet.............................................................................................................. 1
• Added title to page 1 block diagram ...................................................................................................................................... 1
• Deleted footnote from Device Comparison table ................................................................................................................... 4
• Updated ESD Ratings table to current standards ................................................................................................................. 6
• Corrected package name in Thermal Information table ........................................................................................................ 6
• Changed Auxiliary Channel, SINAD and SFDR typical specifications in Electrical Characteristics table ............................. 9
• Changed tDZ_CSDO symbol in Timing Requirements table and Figure 1................................................................................ 11
• Deleted clamp from second sentence of Overview section ................................................................................................ 21
• Changed voltage range values in second paragraph of Analog Inputs section .................................................................. 22
• Changed Range_CHn[2:0] to Range_CHn[3:0] in Programmable Gain Amplifier (PGA) section........................................ 25
• Added Bit 3 column to Table 3 ............................................................................................................................................ 25
• Changed SDO to SDI in second sentence of Event 3 in Data Acquisition Example section .............................................. 34
• Changed Continued Operation in the Selected Mode section ............................................................................................. 37
• Changed Frame Abort Condition section ............................................................................................................................. 38
• Changed STANDBY Mode section: added clarification to description of STANDBY mode................................................. 38
• Changed second paragraph of Power-Down Mode section: added clarification to description of PWR_DN mode ........... 40
• Changed first two paragraphs of Auto Channel Enable with Reset section......................................................................... 41
• Changed first paragraph of Manual Channel n Select section ............................................................................................ 42
• Changed second paragraph of Reset Program Registers section: added clarity to description of RST mode .................. 44
• Changed Program Register Description section ................................................................................................................. 45
Changes from Revision A (July 2014) to Revision B
Page
• Made changes to product preview data sheet, released to Production Data......................................................................... 1
2 Submit Documentation Feedback
Copyright © 2014–2015, Texas Instruments Incorporated
Product Folder Links: ADS8684 ADS8688


Features Product Folder Sample & Buy Technical Documents Tools & Software Support & Community Reference Design ADS8684, A DS8688 SBAS582C – JULY 2014 – REVIS ED APRIL 2015 ADS868x 16-Bit, 500-kSPS, 4- and 8-Channel, Single-Supply, SAR A DCs with Bipolar Input Ranges Addition al Channels in ADS8688 Multiplexer Gain (%FS) 1 Features •1 16-Bit ADCs wit h Integrated Analog Front-End • 4-, 8 -Channel MUX with Auto and Manual Scan • Channel-Independent Programmable In put Ranges: – Bipolar: ±10.24 V, ±5 .12 V, ±2.56 V – Unipolar: 10.24 V, 5.12 V • 5-V Analog Supply: 1.65-V to 5-V I/O Supply • Constant Resistive Input Impedance: 1 MΩ • Input Overvo ltage Protection: Up to ±20 V • On-C hip, 4.096-V Reference with Low Drift Excellent Performance: – 500-kSPS Aggregate Throughput – DNL: ±0.5 LSB ; INL: ±0.75 LSB – Low Drift for Gai n Error and Offset – SNR: 92 dB; THD: –102 dB – Low Power: 65 mW • AUX Input → Direct Connection to ADC Inputs • SPI™-Compatible Interface with Daisy-Chain • Industrial Temperatu.
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