FDMS3602S MOSFET Datasheet

FDMS3602S Datasheet, PDF, Equivalent


Part Number

FDMS3602S

Description

25V Asymmetric Dual N-Channel MOSFET

Manufacture

ON Semiconductor

Total Page 15 Pages
Datasheet
Download FDMS3602S Datasheet


FDMS3602S
FDMS3602S
PowerTrench® Power Stage
25 V Asymmetric Dual N-Channel MOSFET General Description
Features
Q1: N-Channel
„ Max rDS(on) = 5.6 mΩ at VGS = 10 V, ID = 15 A
„ Max rDS(on) = 8.1 mΩ at VGS = 4.5 V, ID = 14 A
Q2: N-Channel
„ Max rDS(on) = 2.2 mΩ at VGS = 10 V, ID = 26 A
„ Max rDS(on) = 3.4 mΩ at VGS = 4.5 V, ID = 22 A
„ Low inductance packaging shortens rise/fall times, resulting in
lower switching losses
„ MOSFET integration enables optimum layout for lower circuit
inductance and reduced switch node ringing
„ RoHS Compliant
This device includes two specialized N-Channel MOSFETs in a
dual PQFN package. The switch node has been internally
connected to enable easy placement and routing of synchronous
buck converters. The control MOSFET (Q1) and synchronous
SyncFETTM (Q2) have been designed to provide optimal power
efficiency.
Applications
„ Computing
„ Communications
„ General Purpose Point of Load
„ Notebook VCORE
„ Server
Pin 1
Pin 1
G1
D1
D1 D1 D1
S2
PHASE
(S1/D2)
G2
S2
S2
S2
Top Bottom
MOSFET Maximum Ratings TA = 25°C unless otherwise noted.
S2
S2
G2
Symbol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous (Package limited)
-Continuous (Silicon limited)
-Continuous
-Pulsed
Single Pulse Avalanche Energy
Power Dissipation for Single Operation
Power Dissipation for Single Operation
Operating and Storage Junction Temperature Range
(Note 3)
TC = 25 °C
TC = 25 °C
TA = 25 °C
TA = 25°C
TA = 25°C
5
6
7
8
Q2 4 D1
PHASE
3 D1
2 D1
Q1 1 G1
Q1 Q2
25 25
±20 ±20
30 40
65
151a
135
261b
40
504
2.21a
1.01c
100
1445
2.51b
1.01d
-55 to +150
Units
V
V
A
mJ
W
°C
Thermal Characteristics
RθJA
RθJA
RθJC
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Case
Package Marking and Ordering Information
Device Marking
22OA
N7OC
Device
FDMS3602S
Package
Power 56
©2011 Semiconductor Components Industries, LLC.
August-2017, Rev. 2
Reel Size
13”
571a
1251c
3.5
501b
1201d
2
°C/W
Tape Width
12 mm
Quantity
3000 units
Publication Order
Number: FDMS3602S/D

FDMS3602S
Electrical Characteristics TJ = 25°C unless otherwise noted.
Symbol
Parameter
Test Conditions
Off Characteristics
BVDSS
ΔBVDSS
ΔTJ
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, VGS = 0 V
ID = 1 mA, VGS = 0 V
ID = 250 μA, referenced to 25°C
ID = 10 mA, referenced to 25°C
IDSS
Zero Gate Voltage Drain Current
VDS = 20 V, VGS = 0 V
IGSS
Gate to Source Leakage Current,
Forward
VGS = 20 V, VDS = 0 V
Type Min. Typ. Max. Units
Q1 25
Q2 25
V
Q1
Q2
20
20
mV/°C
Q1
Q2
1
500
μA
Q1 100 nA
Q2 100 nA
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
VGS = VDS, ID = 1 mA
Q1 1 1.8 3
Q2 1 1.9 3
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25°C
ID = 10 mA, referenced to 25°C
Q1
Q2
-6
-5
mV/°C
rDS(on)
Static Drain to Source On Resistance
VGS = 10 V, ID = 15 A
VGS = 4.5 V, ID = 14 A
VGS = 10 V, ID = 15 A, TJ = 125°C
VGS = 10 V, ID = 26 A
VGS = 4.5 V, ID = 22 A
VGS = 10 V, ID = 26 A, TJ = 125°C
Q1
Q2
4.4 5.6
6.2 8.1
5.9 8.7
mΩ
1.7 2.2
2.6 3.4
2.5 3.9
gFS Forward Transconductance
VDD = 5 V, ID = 15 A
VDD = 5 V, ID = 26 A
Q1 67
Q2 132
S
Dynamic Characteristics
Ciss Input Capacitance
Coss
Output Capacitance
Crss Reverse Transfer Capacitance
Rg Gate Resistance
Q1
VDS = 13 V, VGS = 0 V, f = 1 MHZ
Q2
VDS = 13 V, VGS = 0 V, f = 1 MHZ
Q1
Q2
1264 1680
3097 4120
pF
Q1
Q2
340 450
847 1130
pF
Q1
Q2
58 90
138 210
pF
Q1 0.2 0.6
Q2 0.2 0.9
2
3
Ω
Switching Characteristics
td(on)
Turn-On Delay Time
tr Rise Time
td(off)
Turn-Off Delay Time
tf Fall Time
Qg(TOT)
Total Gate Charge
Qg(TOT)
Total Gate Charge
Qgs Gate to Source Charge
Qgd Gate to Drain “Miller” Charge
Q1
VDD = 13 V, ID = 15 A, RGEN = 6 Ω
Q2
VDD = 13 V, ID = 26 A, RGEN = 6 Ω
VGS = 0V to 10 V
VGS = 0V to 4.5 V
Q1
VDD = 13 V,
ID = 15 A
Q2
VDD = 13 V,
ID = 26 A
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
7.9
12
16
22
ns
2
4.2
10
10
ns
19
31
34
50
ns
1.8
3.2
10
10
ns
19
45
27
64
nC
9
21
13
30
nC
3.9
9.1
nC
2.4
5.3
nC
www.onsemi.com
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Features FDMS3602S PowerTrench® Power Stage FDM S3602S PowerTrench® Power Stage 25 V Asymmetric Dual N-Channel MOSFET Genera l Description Features Q1: N-Channel Max rDS(on) = 5.6 mΩ at VGS = 10 V, ID = 15 A „ Max rDS(on) = 8.1 mΩ at V GS = 4.5 V, ID = 14 A Q2: N-Channel „ Max rDS(on) = 2.2 mΩ at VGS = 10 V, ID = 26 A „ Max rDS(on) = 3.4 mΩ at VGS = 4.5 V, ID = 22 A „ Low inductance p ackaging shortens rise/fall times, resu lting in lower switching losses „ MOSF ET integration enables optimum layout f or lower circuit inductance and reduced switch node ringing „ RoHS Compliant This device includes two specialized N -Channel MOSFETs in a dual PQFN package . The switch node has been internally c onnected to enable easy placement and r outing of synchronous buck converters. The control MOSFET (Q1) and synchronous SyncFETTM (Q2) have been designed to p rovide optimal power efficiency. Applic ations „ Computing „ Communications General Purpose Point of Load „ Notebook VCORE „ Server Pin 1 Pin 1 G1 D1 .
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