Haptic Driver. DRV2667 Datasheet

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DRV2667 Datasheet
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Part DRV2667
Description Piezo Haptic Driver
Feature DRV2667; Product Folder Order Now Technical Documents Tools & Software Support & Community DRV2667 SLOS7.
Manufacture etcTI
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Texas Instruments DRV2667
Product
Folder
Order
Now
Technical
Documents
Tools &
Software
Support &
Community
DRV2667
SLOS751D – MARCH 2013 – REVISED NOVEMBER 2018
DRV2667 Piezo Haptic Driver
with Boost, Digital Front End, and Internal Waveform Memory
1 Features
1 Integrated Digital Front End
– Up to 400-kHz I2C Bus Control
– Advanced Waveform Synthesizer
– 2-kB Internal Waveform Memory
– 100-Byte Internal FIFO Interface
– Immersion TS5000-Compliant
– Optional Analog Inputs
• High-Voltage Piezo-Haptic Driver
– Drives up to 100 nF at 200 VPP and 300 Hz
– Drives up to 150 nF at 150 VPP and 300 Hz
– Drives up to 330 nF at 100 VPP and 300 Hz
– Drives up to 680 nF at 50 VPP and 300 Hz
– Differential Output
• 105-V Integrated Boost Converter
– Adjustable Boost Voltage
– Adjustable Boost Current Limit
– Programable Boost Current Limit
– Integrated Power FET and Diode
– No Transformer Required
• 2-ms Fast Start Up Time
• 3- to 5.5-V Wide Supply Voltage Range
• 1.8 V-Compatible, VDD-Tolerant Digital Pins
2 Applications
• Mobile Phones and Tablets
• Portable Computers
• Keyboards and Mice
• Electronic Gaming
• Touch Enabled Devices
3 Description
The DRV2667 device is a piezo haptic driver with
integrated 105-V boost switch, integrated power
diode, integrated fully-differential amplifier, and
integrated digital front end capable of driving both
high-voltage and low-voltage piezo haptic actuators.
This versatile device supports HD haptics through the
I2C port or through the analog inputs.
The digital interface of the DRV2667 device is
available through an I2C-compatible bus. A digital
interface relieves the costly processor burden of the
PWM generation or additional analog channel
requirements in the host system. Any writes to the
internal FIFO will automatically wake up the device
and begin playing the waveform after the 2-ms
internal startup procedure. When the data flow stops
or the FIFO under-runs, the device will automatically
enter a pop-less shutdown procedure.
The DRV2667 device also includes waveform
memory to store and recall waveforms with minimal
latency as well as an advanced waveform synthesizer
to construct complex haptic waveforms with minimal
memory usage. This provide a means of hardware
acceleration, relieving the host processor of haptic
generation duties as well as minimizing bus traffic
over the haptic interface.
The boost voltage is set using two external resistors,
and the boost current limit is programmable through
the REXT resistor. A typical start-up time of 2 ms
makes the DRV2667 an ideal piezo driver for fast
haptic responses. Thermal overload protection
prevents the device from being damaged when
overdriven.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (MAX)
DRV2667
QFN (20)
4.00 mm × 4.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
3.0 V to 5.5 V
I2C
Analog
Input
Simplified Schematic
L1
C(VDD)
CBULK
VDD
C(REG)
REG
RPU RPU
SDA
SCL
IN+
IN-
SW
BST
PVDD
FB
OUT+
OUT-
C(BST)
R1
R2
Piezo
Actuator
PUMP
C(PUMP)
GND
REXT
R(EXT)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.



Texas Instruments DRV2667
DRV2667
SLOS751D – MARCH 2013 – REVISED NOVEMBER 2018
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information .................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Timing Requirements ................................................ 6
6.7 Switching Characteristics .......................................... 6
6.8 Typical Characteristics .............................................. 7
7 Detailed Description ............................................ 10
7.1 Overview ................................................................. 10
7.2 Functional Block Diagram ....................................... 10
7.3 Feature Description................................................. 10
7.4 Device Functional Modes........................................ 13
7.5 Programming........................................................... 15
7.6 Register Map........................................................... 24
8 Application and Implementation ........................ 29
8.1 Application Information............................................ 29
8.2 Typical Application ................................................. 30
8.3 Initialization Setup ................................................... 32
9 Power Supply Recommendations...................... 36
10 Layout................................................................... 37
10.1 Layout Guidelines ................................................. 37
10.2 Layout Example .................................................... 37
11 Device and Documentation Support ................. 38
11.1 Receiving Notification of Documentation Updates 38
11.2 Community Resources.......................................... 38
11.3 Trademarks ........................................................... 38
11.4 Electrostatic Discharge Caution ............................ 38
11.5 Glossary ................................................................ 38
12 Mechanical, Packaging, and Orderable
Information ........................................................... 38
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (December 2017) to Revision D
Page
• Changed the first sentence of the second paragraph in the FIFO Mode section................................................................. 13
Changes from Revision B (September 2015) to Revision C
Page
• Changed Bit 6-3 in Address: 0x01........................................................................................................................................ 25
• Changed 3.3 µF to 22 µF To: 3.3 µH to 22 µH in the Inductor Selection section ................................................................ 31
Changes from Revision A (January 2014) to Revision B
Page
• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information. section ................................................................................................. 1
• Added Exception description to Brownout Protection section .............................................................................................. 13
Changes from Original (March 2013) to Revision A
Page
• Changed from one-page data sheet to full data sheet in product folder ................................................................................ 1
2 Submit Documentation Feedback
Product Folder Links: DRV2667
Copyright © 2013–2018, Texas Instruments Incorporated



Texas Instruments DRV2667
www.ti.com
5 Pin Configuration and Functions
DRV2667
SLOS751D – MARCH 2013 – REVISED NOVEMBER 2018
RGP Package
20-Pin QFN With Exposed Thermal Pad
Top View
PUMP
VDD
FB
GND
GND
1
2
3
4
5
15 REXT
14 OUT-
13 OUT+
12 PVDD
11 BST
NAME
PUMP
VDD
FB
GND
SW
NC
BST
PVDD
OUT+
OUT-
REXT
IN-
IN+
SCL
SDA
REG
PIN
NO.
1
2
3
4, 5, 6
7, 8
9
10, 11
12
13
14
15
16
17
18
19
20
TYPE
P
P
I
P
P
P
P
O
O
I
I
I
I
I/O
O
Pin Functions
DESCRIPTION
Internal charge pump voltage
3- to 5.5-V supply input. A 1 µF-capacitor is required.
Boost feedback
Supply ground
Internal boost switch pin
No connect
Boost output voltage. A 0.1-µF capacitor is required.
High-voltage amplifier input voltage
Positive haptic driver differential output
Negative haptic driver differential output
Sets boost current limit. Resistor to ground.
Negative analog input
Positive analog input
I2C clock
I2C data
1.8-V regulator output. A 0.1-µF capacitor is required.
Copyright © 2013–2018, Texas Instruments Incorporated
Product Folder Links: DRV2667
Submit Documentation Feedback
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