THS4541 Amplifier Datasheet

THS4541 Datasheet, PDF, Equivalent


Part Number

THS4541

Description

Fully Differential Amplifier

Manufacture

etcTI

Total Page 30 Pages
Datasheet
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THS4541
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THS4541
SLOS375A – AUGUST 2014 – REVISED SEPTEMBER 2014
THS4541 Negative Rail Input, Rail-to-Rail Output, Precision, 850-MHz
Fully Differential Amplifier
1 Features
1 Fully Differential Amplifier (FDA) Architecture
• Bandwidth: 500 MHz (G = 2 V/V)
• Gain Bandwidth Product: 850 MHz
• Slew Rate: 1500 V/µs
• HD2: –95 dBc at 10 MHz (2 VPP, RL = 500 )
• HD3: –90 dBc at 10 MHz (2 VPP, RL = 500 )
• Input Voltage Noise: 2.2 nV/Hz (f > 100 kHz)
• Low offset drift: ±0.5 µV/°C (typ)
• Negative Rail Input (NRI)
• Rail-to-Rail Output (RRO)
• Robust Operation for Rload 50 Ω
• Output Common-Mode Control
• Power Supply:
– Single-Supply Voltage Range: 2.7 V to 5.4 V
– Split-Supply Voltage Range: ±1.35 V to ±2.7 V
– Quiescent Current: 10.1 mA (5-V Supply)
• Power-Down Capability: 2 µA (typ)
2 Applications
• Low-Power, High-Performance ADC Driver
– SAR, ΔΣ, and Pipeline
• Low Power, High Performance
(DC or AC Coupled)
– Single-Ended to Differential Amplifier
– Differential to Differential Amplifier
• Differential Active Filters
• Differential Transimpedance for DAC Outputs
• DC- or AC-Coupled Interface to the ADC3xxx
Family of Low-Power, High-Performance ADCs
• Pin-Compatible to ADA4932-1 (VQFN-16)
3 Description
The THS4541 is a low-power, voltage-feedback, fully
differential amplifier (FDA) with an input common-
mode range below the negative rail, and rail-to-rail
output. Designed for low-power data acquisition
systems where high density is critical in a high-
performance analog-to-digital converter (ADC) or
digital-to-analog converter (DAC) interface design.
The THS4541 features the negative-rail input
required when interfacing a dc-coupled, ground-
centered, source signal. This negative-rail input, with
rail-to-rail output, allows for easy interface between
single-ended, ground-referenced, bipolar signal
sources and a wide variety of successive
approximation register (SAR), delta-sigma (ΔΣ), or
pipeline ADCs using only a single +2.7-V to +5.4-V
power supply.
The THS4541 is characterized for operation over the
wide temperature range of –40°C to 125°C available
in 16-pin VQFN and 10-pin WQFN packages.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
THS4541
VQFN (16)
WQFN (10)
3.00 mm × 3.00 mm
2.00 mm × 2.00 mm
(1) For all available packages, see the package option addendum
at the end of the data sheet.
Simplified Schematic
50- Input Match,
Gain of 2 V/V from Rt,
Single-Ended Source to
Differential Output
THS4541 Wideband,
Fully-Differential Amplifier
Rf1
402
50- 
Source
C1 Rg1
100 nF 191
Rt
60.2
Vocm
Rg2
221
Vcc
±
+
FDA
±
+ PD
Vcc
Rload
500
Output
Measurement
Point
C2
100 nF
Rf2
402
1
Single to Differential Gain of 2, 2-VPP Output
-50
HD2
-60 HD3
-70
-80
-90
-100
-110
-120
-130
-140
0.1
1
Frequency (MHz)
10
50
D013
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

THS4541
THS4541
SLOS375A – AUGUST 2014 – REVISED SEPTEMBER 2014
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Device Family Comparison................................... 3
6 Pin Configuration and Functions ......................... 3
7 Specifications......................................................... 4
7.1 Absolute Maximum Ratings ...................................... 4
7.2 Handling Ratings....................................................... 4
7.3 Recommended Operating Conditions....................... 4
7.4 Thermal Information .................................................. 4
7.5 Electrical Characteristics: Vs+ – Vs– = 5 V ............. 5
7.6 Electrical Characteristics: Vs+ – Vs– = 3 V ............. 8
7.7 Typical Characteristics: 5-V Single Supply ............. 11
7.8 Typical Characteristics: 3-V Single Supply ............. 14
7.9 Typical Characteristics: 3-V to 5-V Supply Range.. 17
8 Parameter Measurement Information ................ 21
8.1 Example Characterization Circuits .......................... 21
8.2 Frequency-Response Shape Factors ..................... 23
8.3 I/O Headroom Considerations ................................ 26
8.4 Output DC Error and Drift Calculations and the Effect
of Resistor Imbalances ............................................ 28
8.5 Noise Analysis......................................................... 30
8.6 Factors Influencing Harmonic Distortion ................. 31
8.7 Driving Capacitive Loads ........................................ 32
8.8 Thermal Analysis..................................................... 32
9 Detailed Description ............................................ 33
9.1 Overview ................................................................. 33
9.2 Functional Block Diagram ....................................... 34
9.3 Feature Description................................................. 35
9.4 Device Functional Modes........................................ 36
10 Application And Implementation ....................... 44
10.1 Application Information.......................................... 44
10.2 Typical Applications .............................................. 44
11 Power-Supply Recommendations ..................... 49
12 Layout................................................................... 49
12.1 Layout Guidelines ................................................. 49
12.2 Layout Example .................................................... 50
13 Device and Documentation Support ................. 51
13.1 Device Support...................................................... 51
13.2 Trademarks ........................................................... 51
13.3 Electrostatic Discharge Caution ............................ 51
13.4 Glossary ................................................................ 51
14 Mechanical, Packaging, and Orderable
Information ........................................................... 51
4 Revision History
Changes from Original (August 2014) to Revision A
Page
• Added clarifying text to note 1 in Pin Functions table. ........................................................................................................... 3
• Changed "Vcm" to "Vicm" in first paragraph ........................................................................................................................ 29
• Changed 0.9 V to 0.91 V in second paragraph of Overview section ................................................................................... 33
• Changed 0.9 V to 0.91 V in first paragraph of AC-Coupled Signal Path Considerations for Single-Ended Input to
Differential Output Conversion section ................................................................................................................................. 36
• Changed "single" to "signal" in first paragraph of Application Information section ............................................................. 44
• Changed "usually" to "always" in fourth sentence of Detailed Design Procedure section ................................................... 44
• Added "(in Hz)" to second paragraph of this page ............................................................................................................... 45
• Added "ΔΣ" to second paragraph of Detailed Design Procedure section ........................................................................... 47
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Product Folder Links: THS4541
Copyright © 2014, Texas Instruments Incorporated


Features Product Folder Sample & Buy Technical Documents Tools & Software Support & Community THS4541 SLOS375A – AUGUST 2014 – REVISED SEPTEMBER 2014 THS4541 Negative Rail Input, Rail-to-Rail Outp ut, Precision, 850-MHz Fully Differenti al Amplifier 1 Features •1 Fully Dif ferential Amplifier (FDA) Architecture • Bandwidth: 500 MHz (G = 2 V/V) • Gain Bandwidth Product: 850 MHz • Sle w Rate: 1500 V/µs • HD2: –95 dBc a t 10 MHz (2 VPP, RL = 500 Ω) • HD3: –90 dBc at 10 MHz (2 VPP, RL = 500 ) • Input Voltage Noise: 2.2 nV/Hz (f > 100 kHz) • Low offset drift: ±0 .5 µV/°C (typ) • Negative Rail Inpu t (NRI) • Rail-to-Rail Output (RRO) Robust Operation for Rload ≥ 50 Ω • Output Common-Mode Control • Pow er Supply: – Single-Supply Voltage Ra nge: 2.7 V to 5.4 V – Split-Supply Vo ltage Range: ±1.35 V to ±2.7 V – Qu iescent Current: 10.1 mA (5-V Supply) Power-Down Capability: 2 µA (typ) 2 Applications • Low-Power, High-Performance ADC Driver – SAR, ΔΣ, and Pipeline • Low Power, High Performance (DC or AC .
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