UCC27524A Driver Datasheet

UCC27524A Datasheet, PDF, Equivalent


Part Number

UCC27524A

Description

Low-Side Gate Driver

Manufacture

etcTI

Total Page 30 Pages
Datasheet
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UCC27524A
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UCC27524A
SLUSBP4B – AUGUST 2013 – REVISED OCTOBER 2014
UCC27524A Dual 5-A, High-Speed, Low-Side Gate Driver With Negative Input Voltage
Capability
1 Features
1 Industry-Standard Pin Out
• Two Independent Gate-Drive Channels
• 5-A Peak Source and Sink-Drive Current
• Independent-Enable Function for Each Output
• TTL and CMOS Compatible Logic Threshold
Independent of Supply Voltage
• Hysteretic-Logic Thresholds for High Noise
Immunity
• Ability to Handle Negative Voltages (–5 V) at
Inputs
• Inputs and Enable Pin-Voltage Levels Not
Restricted by VDD Pin Bias Supply Voltage
• 4.5 to 18-V Single-Supply Range
• Outputs Held Low During VDD-UVLO (Ensures
Glitch-Free Operation at Power Up and Power
Down)
• Fast Propagation Delays (13-ns Typical)
• Fast Rise and Fall Times (7-ns and 6-ns Typical)
• 1-ns Typical Delay Matching Between 2-Channels
• Two Outputs are Paralleled for Higher Drive
Current
• Outputs Held in Low When Inputs Floating
• SOIC-8, HVSSOP-8 PowerPAD™ Package
Options
• Operating Temperature Range of –40 to 140°C
2 Applications
• Switch-Mode Power Supplies
• DC-to-DC Converters
• Motor Control, Solar Power
• Gate Drive for Emerging Wide Band-Gap Power
Devices Such as GaN
3 Description
The UCC27524A device is a dual-channel, high-
speed, low-side, gate-driver device capable of
effectively driving MOSFET and IGBT power
switches. The UCC27524A is a variant of the
UCC2752x family. The UCC27524A adds the ability
to handle –5 V directly at the input pins for increased
robustness. The UCC27524A is a dual non-inverting
driver. Using a design that inherently minimizes
shoot-through current, the UCC27524A is capable of
delivering high-peak current pulses of up to 5-A
source and 5-A sink into capacitive loads along with
rail-to-rail drive capability and extremely small
propagation delay typically 13 ns. In addition, the
drivers feature matched internal propagation delays
between the two channels which are very well suited
for applications requiring dual-gate drives with critical
timing, such as synchronous rectifiers. This also
enables connecting two channels in parallel to
effectively increase current-drive capability or driving
two switches in parallel with a single input signal. The
input pin thresholds are based on TTL and CMOS
compatible low-voltage logic, which is fixed and
independent of the VDD supply voltage. Wide
hysteresis between the high and low thresholds offers
excellent noise immunity.
Device Information(1)
PART NUMBER PACKAGE
BODY SIZE (NOM)
UCC27524A
SOIC (8)
HVSSOP (8)
4.90 mm x 3.91 mm
3.00 mm x 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Dual Non-Inverting Inputs
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

UCC27524A
UCC27524A
SLUSBP4B – AUGUST 2013 – REVISED OCTOBER 2014
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Description (Continued) ........................................ 3
6 Pin Configuration and Functions ......................... 3
7 Specifications......................................................... 4
7.1 Absolute Maximum Ratings ...................................... 4
7.2 Handling Ratings....................................................... 4
7.3 Recommended Operating Conditions....................... 4
7.4 Thermal Information .................................................. 5
7.5 Electrical Characteristics........................................... 6
7.6 Switching Characteristics .......................................... 6
7.7 Typical Characteristics .............................................. 8
8 Detailed Description ............................................ 11
8.1 Overview ................................................................. 11
8.2 Functional Block Diagram ....................................... 12
8.3 Feature Description................................................. 12
8.4 Device Functional Modes........................................ 17
9 Applications and Implementation ...................... 18
9.1 Application Information............................................ 18
9.2 Typical Application .................................................. 18
10 Power Supply Recommendations ..................... 23
11 Layout................................................................... 23
11.1 Layout Guidelines ................................................. 23
11.2 Layout Example .................................................... 24
11.3 Thermal Protection................................................ 24
12 Device and Documentation Support ................. 26
12.1 Trademarks ........................................................... 26
12.2 Electrostatic Discharge Caution ............................ 26
12.3 Glossary ................................................................ 26
13 Mechanical, Packaging, and Orderable
Information ........................................................... 26
4 Revision History
Changes from Revision A (August 2013) to Revision B
Page
• Added Pin Configuration and Functions section, Handling Rating table, Feature Description section, Device
Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout
section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information
section ................................................................................................................................................................................... 1
Changes from Original (August 2013) to Revision A
Page
• Changed marketing status from Product Preview to Production Data. .................................................................................. 1
• Changed Enable voltage, ENA and ENB minimum from 0 to –2. .......................................................................................... 4
2 Submit Documentation Feedback
Product Folder Links: UCC27524A
Copyright © 2013–2014, Texas Instruments Incorporated


Features Product Folder Sample & Buy Technical Documents Tools & Software Support & Community UCC27524A SLUSBP4B – AUGUS T 2013 – REVISED OCTOBER 2014 UCC2752 4A Dual 5-A, High-Speed, Low-Side Gate Driver With Negative Input Voltage Capa bility 1 Features •1 Industry-Standa rd Pin Out • Two Independent Gate-Dri ve Channels • 5-A Peak Source and Sin k-Drive Current • Independent-Enable Function for Each Output • TTL and CM OS Compatible Logic Threshold Independe nt of Supply Voltage • Hysteretic-Log ic Thresholds for High Noise Immunity Ability to Handle Negative Voltages (–5 V) at Inputs • Inputs and Enabl e Pin-Voltage Levels Not Restricted by VDD Pin Bias Supply Voltage • 4.5 to 18-V Single-Supply Range • Outputs He ld Low During VDD-UVLO (Ensures Glitch- Free Operation at Power Up and Power Do wn) • Fast Propagation Delays (13-ns Typical) • Fast Rise and Fall Times ( 7-ns and 6-ns Typical) • 1-ns Typical Delay Matching Between 2-Channels • Two Outputs are Paralleled for Higher Drive Current • Outp.
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