Operational Amplifiers. OPA2187 Datasheet

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OPA2187 Datasheet
Recommendation OPA2187 Datasheet
Part OPA2187
Description 36-V Operational Amplifiers
Feature OPA2187; Product Folder Order Now Technical Documents Tools & Software Support & Community Reference Des.
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Texas Instruments OPA2187
Product
Folder
Order
Now
Technical
Documents
Tools &
Software
Support &
Community
Reference
Design
OPA187, OPA2187, OPA4187
SBOS807D – DECEMBER 2016 – REVISED DECEMBER 2018
OPAx187 0.001-µV/°C Drift, Low Power, Rail-to-Rail Output
36-V Operational Amplifiers Zero-Drift Series
1 Features
1 Low Offset Voltage: 10 µV (maximum)
• Zero Drift: 0.001 µV/°C
• Low Noise: 15 nV/Hz
• PSRR: 160 dB
• CMRR: 140 dB
• AOL: 160 dB
• Quiescent Current: 100 µA
• Wide Supply Voltage: ±2.25 V to ±18 V
• Rail-to-Rail Output Operation
• Input Includes Negative Rail
• Low Bias Current: 100 pA (typical)
• EMI Filtered Inputs
• Microsize Packages
2 Applications
• Bridge Amplifier
• Strain Gauge
• Test and Measurement Equipment
• Transducer Application
• Temperature Measurement
• Electronic Scales
• Medical Instrumentation
• RTD Amplifier
• Precision Active Filters
• Low-Side Current Monitoring
3 Description
The OPAx187 series operational amplifiers use auto-
zeroing techniques to simultaneously provide low-
offset voltage (1 µV), and near zero drift over time
and temperature. These miniature, high-precision,
low-quiescent current amplifiers offer high-input
impedance and rail-to-rail output swing within 5 mV of
the rails into high-impedance loads. The input
common-mode range includes the negative rail.
Either single or dual supplies can be used in the
range of 4.5 V to 36 V (±2.25 V to ±18 V).
The single version of the OPAx187 device is
available in microsize 8-pin VSSOP, 5-pin SOT-23,
and 8-pin SOIC packages. The dual version is offered
in 8-pin VSSOP and 8-pin SOIC packages. The quad
version is offered in 14-pin SOIC, 14-pin TSSOP, and
16-pin WQFN packages. All versions are specified for
operation from –40°C to +125°C.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
SOIC (8)
4.90 mm × 3.91 mm
OPA187
SOT-23 (5)
2.90 mm × 1.60 mm
VSSOP (8)
3.00 mm × 3.00 mm
OPA2187
SOIC (8)
VSSOP (8)
4.90 mm × 3.91 mm
3.00 mm × 3.00 mm
SOIC (14)
8.70 mm × 3.90 mm
OPA4187
TSSOP (14)
WQFN (16)
(Preview)
5.00 mm × 4.40 mm
4.00 mm × 4.00 mm
(1) For all available packages, see the package option addendum
at the end of the data sheet.
OPAx187 Offers Precision Low-Side Current Measurement Capability
VSUPPLY
+
±
I
Load
100
RSHUNT 100
I
100 k GND
VSUPPLY
+
OPA187
±
GND
GND
100 k
G = 1000 ‡ 5SHUNT ‡ ,
VOUT
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION
DATA.



Texas Instruments OPA2187
OPA187, OPA2187, OPA4187
SBOS807D – DECEMBER 2016 – REVISED DECEMBER 2018
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 5
6.1 Absolute Maximum Ratings ...................................... 5
6.2 ESD Ratings.............................................................. 5
6.3 Recommended Operating Conditions....................... 5
6.4 Thermal Information: OPA187 .................................. 6
6.5 Thermal Information: OPA2187 ................................ 6
6.6 Thermal Information: OPA4187 ................................ 6
6.7 Electrical Characteristics: High-Voltage Operation .. 7
6.8 Electrical Characteristics: Low-Voltage Operation... 8
6.9 Typical Characteristics .............................................. 9
7 Detailed Description ............................................ 16
7.1 Overview ................................................................. 16
7.2 Functional Block Diagram ....................................... 16
7.3 Feature Description................................................. 17
7.4 Device Functional Modes........................................ 20
8 Application and Implementation ........................ 21
8.1 Application Information............................................ 21
8.2 Typical Applications ................................................ 21
9 Power Supply Recommendations...................... 25
10 Layout................................................................... 26
10.1 Layout Guidelines ................................................. 26
10.2 Layout Example .................................................... 26
11 Device and Documentation Support ................. 27
11.1 Device Support .................................................... 27
11.2 Documentation Support ....................................... 27
11.3 Related Links ........................................................ 28
11.4 Receiving Notification of Documentation Updates 28
11.5 Community Resources.......................................... 28
11.6 Trademarks ........................................................... 28
11.7 Electrostatic Discharge Caution ............................ 28
11.8 Glossary ................................................................ 28
12 Mechanical, Packaging, and Orderable
Information ........................................................... 28
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (December 2018) to Revision D
Page
• Changed OPA4187 SOIC and TSSOP packages from product preview to production data ................................................. 1
• Changed offset drift (high and low supply) max to ±15nV/°C................................................................................................. 8
Changes from Revision B (October 2018) to Revision C
Page
• First release of production OPA187 SOIC device .................................................................................................................. 1
Changes from Revision A (July 2017) to Revision B
Page
• Changed OPA187 SOIC status to preview ............................................................................................................................ 1
• Changed OPA4187 SOIC, TSSOP and WQFN status to preview ......................................................................................... 1
• Changed offset drift (high supply) typical from ±5 nV/to ±1 nV/and max from ±50 nV/to ±20 nV/...................... 7
• Changed input bias current max (high supply) from ±5 nA to ±7.5 nA .................................................................................. 7
• Changed input offset current max (high supply) from ±5 nA to ±14.5 nA .............................................................................. 7
• Changed offset drift (low supply) typical from ±5 nV/to ±1 nV/and max from ±50 nV/to ±20 nV/........................ 8
• Changed Offset Voltage Production Distribution figure........................................................................................................ 10
Changes from Original (December 2016) to Revision A
Page
• Deleted VSON package option from the Description ............................................................................................................. 1
• Deleted VSON package option from the Device Information table ........................................................................................ 1
• Added WQFN package option to the Device Information table.............................................................................................. 1
• Deleted OPA187 DRG package option from Pin Configuration and Functions ..................................................................... 3
• Added WQFN package to Pin Configuration and Functions .................................................................................................. 4
2 Submit Documentation Feedback
Copyright © 2016–2018, Texas Instruments Incorporated
Product Folder Links: OPA187 OPA2187 OPA4187



Texas Instruments OPA2187
www.ti.com
5 Pin Configuration and Functions
OPA187: DBV Package
5-Pin SOT-23
Top View
OPA187, OPA2187, OPA4187
SBOS807D – DECEMBER 2016 – REVISED DECEMBER 2018
OPA187: D and DGK Packages
8-Pin SOIC and 8-pin VSSOP
Top View
NAME
+IN
–IN
NC
OUT
V+
V–
OUT
V±
+IN
1
2
3
PIN
DBV
3
4
1
5
2
5
4
Not to scale
D and DGK
3
2
1, 5, 8
6
7
4
V+
NC 1
8 NC
±IN 2 ±
7 V+
+IN 3 +
6 OUT
±IN
V± 4
5 NC
Not to scale
(1) NC denotes no internal connection.
Pin Functions: OPA187
I/O DESCRIPTION
I Non-inverting input
I Inverting input
— No connection (can be left floating)
O Output signal
— Positive (highest) supply voltage
— Negative (lowest) supply voltage
OPA2187: D and DGK Packages
8-Pin SOIC and 8-Pin VSSOP
Top View
OUT A
±IN A
+IN A
V±
1
2
3
4
8 V+
7 OUT B
6 ±IN B
5 +IN B
Not to scale
Pin Functions: OPA2187
NAME
PIN
D and DGK
I/O
DESCRIPTION
+IN A
3 I Non-inverting input, channel A
–IN A
2 I Inverting input, channel A
+IN B
5 I Non-inverting input, channel B
–IN B
6 I Inverting input, channel B
OUT A 1 O Output, channel A
OUT B 7 O Output, channel B
V+ 8 — Positive (highest) supply voltage
V– 4 — Negative (lowest) supply voltage
Copyright © 2016–2018, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: OPA187 OPA2187 OPA4187
3





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